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Main points of this past exam are: Tech Engineer, Incomplete Circuits, Switch Level, Implementation Using, Design Should, Simplify the Expression, Mixed Logic, Ready Expressions, Switch-Ready, Boolean Expressions
Typology: Exams
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4 problems, 4 pages Exam One Solutions 9 February 2000
Problem 1 (3 parts, 30 points) Incomplete Circuits
For each expression below, create a switch level implementation using N and P type switches. Assume both inputs and their complements are available. Your design should contain no shorts or floats. Use as few transistors as possible, but do not simplify the expression.
OUTx = A โ B โ C + D OUTy = A โ ( B + C โ D )โ E OUTz = A + B + C
4 problems, 4 pages Exam One Solutions 9 February 2000
Problem 2 (2 parts, 25 points) Mixed Logic
In the year 3000, a Georgia Tech engineer opens a millennium time capsule that contains a gate design using mixed logic notation. โGreat use of a common sub-expression!โ she exclaims, โBut you should have used NAND gates.โ Extract the two output expressions from the circuit below and then reimplement using NAND gates. Determine the transistor savings of the new design.
OUTx = A โ B + C
OUTy = (^) B + C + D โ E
NAND gate implementation (use correct mixed logic notation)
OUTx
OUTy
Transistors in original implementation 4 x 4 + 6 x 2 = 28
Transistors in NAND implementation 4 x 4 + 3 x 2 = 22
4 problems, 4 pages Exam One Solutions 9 February 2000
Part B (10 points) For the following behavior (in map format), derive a simplified sum of products expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential. Then write the simplified SOP expression.
simplified SOP expression (^) A โ B + A โ D + A โ B โ D + A โ C
Part C (10 points) For the following behavior (in map format), derive a simplified product of sums expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential. Then write the simplified POS expression.
simplified POS expression (^) ( A + B )โ ( A + D )
