Exam Solutions for ECE 2030B Computer Engineering Spring 2010 - Problems 1 to 4, Exams of Computer Science

The solutions to exam one for the computer engineering course ece 2030b in spring 2010. The exam consists of four problems, each with multiple parts. The problems cover topics such as switch-level design, mixed logic reengineering, boolean algebra, and karnaugh maps. Students are required to complete missing networks, implement boolean expressions using specific gate types, transform expressions to a form ready for switch level implementation, and derive simplified expressions using karnaugh maps.

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2012/2013

Uploaded on 04/08/2013

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ECE 2030B Computer Engineering Spring 2010
4 problems, 5 pages Exam One Solutions 10 February 2010
1
Problem 1 (2 parts, 20 points) Switch-level Design
The three parts below contain (A) a pull up network, (B) a pull down network, and (C) an
expression to be implemented. For (A) and (B), complete the missing complementary switching
networks so the circuit contains no floats or shorts and write the Boolean expression computed
by the completed circuit. For (C), design the entire switching network. Assume the inputs and
their complements are available.
(A) (B)
OUTx = )()( FEDCBA ++โ‹…+โ‹… OUTy = EDC โ‹…+
OUTz = )( EDBCA +โ‹…+โ‹… (C)
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4 problems, 5 pages Exam One Solutions 10 February 2010

Problem 1 (2 parts, 20 points) Switch-level Design

The three parts below contain (A) a pull up network, (B) a pull down network, and (C) an expression to be implemented. For (A) and (B), complete the missing complementary switching networks so the circuit contains no floats or shorts and write the Boolean expression computed by the completed circuit. For (C), design the entire switching network. Assume the inputs and their complements are available.

(A) (B)

OUTx = (^) A โ‹… ( B + C )โ‹…( D + E + F ) OUTy = (^) C + D โ‹… E

OUTz = A^ โ‹…^ C + B โ‹…(^ D + E ) (C)

4 problems, 5 pages Exam One Solutions 10 February 2010

Problem 2 (2 parts, 28 points) Mixed Logic Reengineering

For the following expressions, implement the Boolean expression using the specified gate type. Use correct mixed-logic notation. Do not simplify the expression. You may use multi-input gates. Minimize the total transistors (switches) required. When possible, use common subexpressions to reduce gate counts. Also determine the number of switches used in each implementation.

Part A (14 points) Implement A โ‹… ( B + C )โ‹…( D + E )+( D + E )using only NOR and NOT gates.

switches = (^) 22T

Part B (14 points) Implement A + ( B โ‹… C + D )+ E โ‹… F using only AND and NOT gates.

switches = (^) 34T

4 problems, 5 pages Exam One Solutions 10 February 2010

Problem 4 (2 parts, 30 points) Karnaugh Maps

Part A (15 points) Given the following Karnaugh Map, circle and list all the prime implicants for a sum- of-products (SOP) expression, indicating which are essential. Derive the simplified SOP expression.

X

A

A

B B

C

C

C

D

D D

prime implicants

essential? yes no

1

B C D

A B D

A C D

A C

simplified SOP expression (^) A โ‹… C + A โ‹… C โ‹… D + A โ‹… B โ‹… D or A โ‹… C + A โ‹… C โ‹… D + B โ‹… C โ‹… D

Part B (15 points) For the following expression, derive a simplified product of sums expression using a Karnaugh Map. Circle and list all the prime implicants, indicating which are essential.

Out =( A + B + C )โ‹…( A + B + C + D )โ‹…( A + C + D )โ‹…( A + B + C + D )โ‹…( A + B + C )

A

A

B B

C

C

C

D

D D

prime implicants

essential? yes no

B + C

C + D

A + B + D

simplified POS expression (^) ( B + C )โ‹…( C + D )โ‹…( A + B + D )