Introduction to PIC Microcontroller: ISA-2 - The Hardware: Part 2, Slides of Assembly Language Programming

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Introduction to PIC

Instruction Set Architecture

Part 2 - The Hardware

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Where to Get More Information

These slides provide only the basic information you need. There’s so much moreyou’ll need to look up to really understand all this. I recommend the following:1.^ Bates

^ Chapter 8 of our Text

2.^ The description of the 16F84A as given at

PIC16F84A.pdf

3.^ The Microchip website contains lots of examples of code.

www.microchip.com

4.^ And of course the web – everything is only a “Google” away.

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High Performance RISC CPU Features: • Only 35 single word instructions to learn• All instructions single-cycle except forprogram branches which are two-cycle• Operating speed: DC - 20 MHz clock input• DC - 200 ns instruction cycle• 1024 words of program memory• 68 bytes of Data RAM• 64 bytes of Data EEPROM• 14-bit wide instruction words• 8-bit wide data bytes• 15 Special Function Hardware registers• Eight-level deep hardware stack• Direct, indirect and relative addressingmodes

The PIC 16F84A

Peripheral Features: • 13 I/O pins with individual direction control• High current sink/source for direct LED drive Special Microcontroller Features: • 10,000 erase/write cycles Enhanced FLASHProgram memory typical. (You can programthe device 10,000 times.)• 10,000,000 typical erase/write cycles EEPROMData memory typical.• EEPROM Data Retention > 40 years. (You canturn the power on/off and the data will still bethere.)• In-Circuit Serial Programming™ (ICSP™) - viatwo pins. (You can program the device right inthe circuit.)

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The PIC 16F84A

This is how the 16F84 really looks.

This is a simple generalized picture.

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The PIC 16F84A MEMORY ORGANIZATION

There are two memory blocks in the PIC16F84A.These are the

program

memory and the

data

memory.Each block has its own bus, so that access toeach block can occur during the same oscillatorcycle. Program Memory Organization The PIC16FXX has a 13-bit program countercapableof addressing an 8K x 14 program memoryspace.For the PIC16F84A, the first 1K x 14 (0000h-03FFh) are physically implemented as seen inthe Figure. This is space for 1024 instructions!The RESET vector is at 0000h and the interruptvector is at 0004h.

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The PIC 16F84A

Data Memory Organization The data memory is partitioned into two areas:

The^

Special Function Registers

(SFR) area,

The^

General Purpose Registers

(GPR) area.

The SFRs control the operation of the device.Instructions MOVWF and MOVF can move values fromthe W register to any location in the register file (“F”),and vice-versa.Data memory is partitioned into two banks which containthe general purpose registers and the special functionregisters. Bank 0 is selected by

clearing

the RP0 bit

(STATUS<5>).

Setting

the RP0 bit selects Bank 1.

Each Bank extends up to 4Fh (80 bytes).The first 12 locations of each Bank are SFR.The remaining 68 locations are GPR.Some SFR’s can be accessed in either Bank, some canonly be reached in a particular Bank. We use thebanksel instruction to choose the bank we want to use.

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STATUSREGISTER

PIC 16F84A^ The STATUS registercontains the arithmeticstatus of the ALU, theRESET status and thebank select bit for datamemory.^ The banksel instructionmanipulates this bit.The Z bit is set whenan instruction producesa zero result.The C bit is set whenan overflow.

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PIC 16F84A

IO Ports

I/O PORTS Some pins for these I/O ports are multiplexed with an alternatefunction for the peripheral features on the device. This means thepin can used either for I/O OR for something else (but not both atthe same time.) PORTA and TRISA Registers PORTA is a 5-bit wide, bi-directional port. The corresponding datadirection register is TRISA. Setting a TRISA bit (= 1) will make thecorresponding PORTA pin an input (i.e., put the correspondingoutput driver in a Hi-Impedance mode). Clearing a TRISA bit (= 0)will make the corresponding PORTA pin an output (i.e., put thecontents of the output latch on the selected pin).Reading the PORTA register reads the status of the pins, whereaswriting to it will write to the port latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that theport pins are read. This value is modified and then written to the portdata latch. PORTB and TRISB Registers PORTB operates in much the same way as PORTA, except that all8 pins can be configured as I/O.Notice in the Figure how the I/O pin can be configured as eitherinput or output.

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What does it mean when the spec says that the pins are multiplexed with other functions??It means that these pins CAN be used as Input/Output, OR they can be configured tohandle other types of functions. More about these other functions later.

PIC 16F84A

What do some ofthese words mean??

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PIC 16F84A

Interrupts

The PIC16F84A has 4 sources or events that can cause an interrupt:1.^ External interrupt RB0/INT pin – an electrical signal is exerted on the pin.2.^ TMR0 overflow interrupt – the timer has been started and then completes its count.3.^ PORTB change interrupts (pins RB7:RB4) - One of these pins changes from low to high or high tolow, and thus an interrupt is signaled.4.^ Data EEPROM write complete interrupt – the program started a EEPROM write and then went todo something else, and the interrupt occurred when that write completed. None of these events will cause an interrupt unless they are configured to do so. The interrupt control register (INTCON) holds all the relevant information. Ita)^ records individual interrupt requests in flag bitsb)^ it contains the individual and global interrupt enable bits.The “return from interrupt” instruction, RETFIE, exits interrupt routine as well as sets the GIE bit, whichre-enables interrupts.When an interrupt is responded to,a)^ the GIE bit is cleared to disable any further interrupt,b)^ the return address is pushed onto the stackc)^ and the PC is loaded with 0004h – which should point to code for the interrupt handler.d)^ Once in the Interrupt Service Routine, the source(s) of the interrupt can be determined by pollingthe interrupt flag bits.e)^ The interrupt flag bit(s) must be cleared in software before re-enabling interrupts to avoid infiniteinterrupt requests.

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PIC 16F84A^ Interrupts

As part of Configuration, you must set/clear this bit.We will be using two of these interrupts. External Interrupt on RB0/INT PIN • Edge triggered: either rising if INTEDG bit is set, or

falling if INTEDG bit is clear.

• When a valid edge appears on the RB0/INT pin, theINTF bit (INTCON<1>) is set.• This interrupt can be disabled by clearing control bitINTE (INTCON<4>).• Flag bit INTF must be cleared in software via theInterrupt Service Routine before re-enabling thisinterrupt. DATA EEPROM INTERRUPT • At the completion of a data EEPROM write cycle, flagbit EEIF (EECON1<4>) will be set.• The interrupt can be enabled/disabled bysetting/clearing enable bit EEIE (INTCON<6>)

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PIC 16F84A^ Interrupts

Context Saving During Interrupts During an interrupt, only the return PC value is saved on the stack.Typically, users wish to save key register values during an interrupt(e.g., W register and STATUS register). This is implemented insoftware.The code in The Example stores and restores the STATUS and Wregister’s values. The user defined registers, W_TEMP andSTATUS_TEMP are the temporary storage locations for the W andSTATUS registers values.^ ;^

SAVING STATUS AND W REGISTERS IN RAMPUSH: MOVWF W_TEMP

; Copy W to TEMP register,

SWAPF STATUS, W

; Swap status to be saved into W

MOVWF STATUS_TEMP

; Save status to STATUS_TEMP register

ISR:

: ; Interrupt Service Routine: ; should configure Bank as required: ;

POP:

SWAPF STATUS_TEMP,W

; Swap nibbles in STATUS_TEMP register; and place result into W

MOVWF STATUS

; Move W into STATUS register; (sets bank to original state)

SWAPF W_TEMP, F

; Swap nibbles in W_TEMP and put in W_TEMP

SWAPF W_TEMP, W

; Swap nibbles in W_TEMP and put into W

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PIC 16F84A

EEPROMMemory

Can check here that write finishedEnables a write to EEPROMStarts the write^ Starts the Read from EEPROM

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PIC 16F84A

EEPROM Memory

;^ This is an example of code to

read

from the EEPROM

;^ To read a EEPROM location, the user must write the desired address to the;^ EEADR register and

then set the control bit RD.

banksel

EEADR

; Aim at bank 0

movlw

Starting_Addr

; This is the starting address to use in the EEPROM

movwf

EEADR

; Put that address so the read can find it.

banksel

EECON

; Aim at bank 1

bsf^

EECON1,

RD^

; Define the action as a read

banksel

EEDATA

; Aim at bank 0

movf

EEDATA, W

; Put the data from EEPROM into the W register