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Data Types

• Each data object has a type associated with

it.

• The type defines the set of values that the

object can have and the set of operation that

are allowed on it.

Data types defined in the

standard package

• Predefined data type are as follows:
  • Bit
  • Bit_vector
  • Boolean
  • Character
  • File_open_kind*
  • File_open_status*
  • Integer
  • Natural
  • Positive
  • Real
  • Severity_level
  • String
  • Time* Docsity.com

Data Types

• A type declaration defines the name of the

type and the range of the type.

• Type declaration are allowed in package

declaration sections, entity declaration

sections, architecture declaration sections,

subprogram declaration section and process

declaration sections.

Types available in VHDL

• Scalar types
  • Integer types
  • Real types
  • Enumerated
  • Physical
• Composite Types
  • Arrays type
  • Records
• Access Types (equivalent of pointers in C)
• File types

Example - Integer

Architecture test of test is

Begin

Process (x) Variable a: integer; Begin a := 1; --ok a := -1 ; -- ok a := 1.0; -- error End process;

End test;

Real Types

• Real Types are used to declare objects that

emulate mathematical real numbers.

• Real number can be used to represent

numbers out of the range of integer value as

well as fractional values.

• Minimum Range: -1.0E+38 to +1.0E+

Enumerated types

• Enumerated type is used to represent exactly the values required for a specific operation.
• All of the values of an enumerated type are user- defined.
• This values can be identifiers or single-character literals.
• A typical example:

TYPE fourval IS (‘x’, ‘0’, ‘1’, ‘z’); TYPE color IS (red,yellow, blue,green,orange);

IEEE standard 1164

Type std_logic is (

‘U’, -- uninititalized ‘X’, -- forcing unknown ‘0’, -- forcing 0 ‘1’, -- forcing 1 ‘Z’, --high impedence ‘W’, --weak unknown ‘L’, --weak 0 ‘H’, -- weak 1 ‘-’); -- don’t care

Predefined VHDL aggregate data

types

• Bit_vector array (natural range<>) of bit
• String array (natural range<>) of char
• Text file of “string”

IEEE standard 1164 aggregate

data type

• Std_logic_vector array (natural range <>) of

std_ulogic;

• Std_logic_vector array (natural range<>) of

std_logic;

Architecture test_ar of mp is

Type color is range in (yellow,red);

Begin

process (test) begin case test is when red => a := data; end case; end process;

End test_ar; Docsity.com

Physical Types

• Physical types are used to represent physical quantities such as distance,current, time and so on.
• A physical type provides for a base unit,and successive units are then defined in terms of this unit.
• The smallest unit represented is one base unit.
• The largest unit is determined by the range specified in physical type declaration.
• TIME is a predefined physical types

Example – Physical Type

Package example is

type current is range 0 to 10000000000 units na; ua = 1000 na; -- nano amp ma = 1000 ua; -- micro amp a = 1000 ma; End units; type load_factor is (small, med, big);

End example;

Architecture delay-cal of delay is

Begin

delay <= 10 ns when (load = small) else 20 ns when (load = med) else 30 ns when (load = big) else 40 ns; out-current <= 1000 ua when (load= small) else 1 ma when (load = med) else 100 ua;

End delay-cal;