Universal Gates-Digital Logic Design-Lecture Slides, Slides of Digital Logic Design and Programming

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• EE -

Either a NAND or a NOR gate.
The term universal refers to a property of a gate that permits any logic function to be implemented by that gate or by a combination of gates of that kind.

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of gates of that kind.

A

B

A + B

OR gate

B

A

B

A + B

NOR gate

NOR gates are also universal gates and can form all of the basic gates

A A

Inverter

A A

OR gate A B A+B

Convert the following circuit such that there are
only NAND gates
only NOR gates

C

A

A

X = A C +A B

B

Assumptions:
Gate loading and delay are ignored
Cell library contains an inverter and n-input NAND gates, n = 2, 3, …
The mapping is accomplished by:

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The mapping is accomplished by:
Replacing AND and OR symbols,
Pushing inverters through circuit fan-out points, and
Canceling inverter pairs

2. Repeat the following pair of actions until there is at most one inverter between:
   A circuit input or driving NAND gate output, and
   The attached NAND gate inputs.

.. .

.. .

A B

C

D

F

E (a)

A B

C

7

5

1

6 2 4 9

X Y

D 8 3 E

F

(b)

OI

(a) (b) A B

C D E

F

(d)

X

5

5 7 Y^6

(c)

1. Replace AND and OR gates as mentioned

.. .

.. .

.. .

.. .

2. Repeat the following pair of actions until there is at most one inverter between : a. A circuit input or driving NAND gate output, and b. The attached NAND gate inputs.

.. .

.. .

Convert the following circuit such that there are
only NAND gates
only NOR gates

C

A

A

X = A C +A B

B

A buffer is a gate with the function F = X:

In terms of Boolean function, a buffer is the same as a connection!

X F

same as a connection!

So why use it?
A buffer is an electronic amplifier used to improve circuit voltage levels and increase the speed of circuit operation.

What is a Hi-Z value?
The Hi-Z value behaves as an open circuit
This means that, looking back into the circuit, the output appears to be disconnected.
It is as if a switch between the internal circuitry and the output has been opened.

Hi-Z may appear on the output of any gate, but we restrict gates to:
a 3-state buffer, or
Optional: a transmission gate each of which has one data input and one control input.

For the symbol and truth table, IN is the data input, and EN, the control input.
For EN = 0, regardless of the value on IN (denoted by X), the output value is Hi-Z.

IN

EN

OUT

Symbol

For EN = 1, the output value follows the input value.
Variations:
Data input, IN, can be inverted
Control input, EN, can be inverted by addition of “bubbles” to signals.

EN IN OUT 0 X Hi-Z 1 0 0 1 1 1

Truth Table