CS232: Computer Architecture II - Introduction, Study notes of Computer Architecture and Organization

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January 16, 2008 ©2006 Craig Zilles (adapted from slides by Howard Huang) 1

CS232: Computer Architecture II

Fall 2007

 Computer architecture is about building and analyzing computer systems.  In CS232, we will take a tour of the whole machine.  Specifically, we’ll…

What is computer architecture about?

Processor^ Memory Input/Output HLL^ Compiler ASM

 The Instruction Set Architecture (ISA) is the bridge between the hardware and the software. — We’ll learn the MIPS ISA in detail — We’ll get a brief introduction to the x86 ISA — We’ll learn how HLL program constructs are represented to the machine — We won’t learn how compilers work, but we’ll learn what they do

Study Instruction Set Architectures

Processor^ Memory Input/Output HLL^ Compiler ASM

 We’ll learn how to performance tune programs.  We’ll exploit explicit parallelism to make programs run faster — We’ll optimize a program using SSE instructions

Learn about performance

HLL^ Compiler ASM Processor Memory Input/Output

 We’ll learn how virtual memory makes programming easy  We’ll learn how caches make memory fast  We’ll learn about buses and disks

Learn about Memory and I/O systems

Processor Memory Input/Output HLL^ Compiler ASM

Why should you care?

 It is interesting. — How do you make a processor that runs at 3Ghz?  It will help you be a better programmer. — Understanding how your program is translated to assembly code lets you reason about correctness and performance. — Demystify the seemingly arbitrary ( e.g., bus errors, segmentation faults)  Many cool jobs require an understanding of computer architecture. — The cutting edge is often pushing computers to their limits. — Supercomputing, games, portable devices, etc.  Computer architecture illustrates many fundamental ideas in computer science — Abstraction, caching, and indirection are CS staples

Who we are

 Lecturer : Prof. Craig Zilles

• I do research on computer architecture and compilers  Section Instructors & Teaching Assistants : Abhilasha Choudhary Abner Guzman Rivera Peter Young  Undergraduate Assistant : Brian James

How the class will be organized

 The textbook provides the most comprehensive coverage  Lecture and section will present course material  Section problems useful for gauging your understanding of the material — Weekly, graded on effort, and good practice for the exams  Machine problems are more open-ended applications of course material — Due most weeks, graded, can be done in groups (1-3 people)  Homeworks used for closed-form, quantitative problems — Due occasionally, graded  Exams: three in-class midterms and one final  See the syllabus: http://www.cs.uiuc.edu/class/cs232/html/info.html  Questions?

MIPS

 In this class, we’ll use the MIPS instruction set architecture (ISA) to illustrate concepts in assembly language and machine organization — Of course, the concepts are not MIPS-specific — MIPS is just convenient because it is real, yet simple (unlike x86)  The MIPS ISA is still used in many places today. Primarily in embedded systems, like: — Various routers from Cisco — Game machines like the Nintendo 64 and Sony Playstation 2

What you will need to learn this month

 You must become “fluent” in MIPS assembly: — Translate from C to MIPS and MIPS to C  Example problem from a previous mid-term 1: Question 3: Write a recursive function (30 points) Here is a function pow that takes two arguments (n and m, both 32-bit numbers) and returns nm^ (i.e., n raised to the mth^ power). int pow(int n, int m) { if (m == 1) return n; return n * pow(n, m-1); } Translate this into a MIPS assembly language function.

Register file review

 Here is a block symbol for a general 2 k × n register file. — If Write = 1 , then D data is stored into D address. — You can read from two registers at once, by supplying the A address and B address inputs. The outputs appear as A data and B data.  Registers are clocked, sequential devices. — We can read from the register file at any time. — Data is written only on the positive edge of the clock. D data Write D address A address B address A data B data 2 k^ × n Register File k k k n n n

MIPS register file

 MIPS processors have 32 registers, each of which holds a 32-bit value. — Register addresses are 5 bits long. — The data inputs and outputs are 32-bits wide.  More registers might seem better, but there is a limit to the goodness. — It’s more expensive, because of both the registers themselves as well as the decoders and muxes needed to select individual registers. — Instruction lengths may be affected, as we’ll see in the future. D data Write D address A address B address A data B data 32 × 32 Register File 5 5 5 32 32 32

Basic arithmetic and logic operations

 The basic integer arithmetic operations include the following: add sub mul div  And here are a few logical operations: and or xor  Remember that these all require three register operands; for example: add $t0, $t1, $t2 # $t0 = $t1 + $t mul $s1, $s1, $a0 # $s1 = $s1 x $a Note: a full MIPS ISA reference can be found in Appendix A (linked from website)

 More complex arithmetic expressions may require multiple operations at the instruction set level. t0 = (t1 + t2) × (t3 − t4) add $t0, $t1, $t2 # $t0 contains $t1 + $t sub $s0, $t3, $t4 # Temporary value $s0 = $t3 - $t mul $t0, $t0, $s0 # $t0 contains the final product  Temporary registers may be necessary, since each MIPS instructions can access only two source registers and one destination. — In this example, we could re-use $t3 instead of introducing $s0. — But be careful not to modify registers that are needed again later.

Larger expressions