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Material Type: Exam; Class: Microprocessor-Based Design; Subject: Electrical and Computer Engr; University: University of Illinois - Chicago; Term: Fall 2002;
Typology: Exams
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Final Exam
Fall 2002
(Print) LAST Name^ FIRST Name
Signature SS#
All problems are 5 points. Note: You must write clearly and neatly. If I can't read your answer (because it is illegible)it will be marked wrong. BE NEAT!
Construct a one bit binary memory cell using a D Flip-Flop and any other necessary logic devices. Your circuit should contain all of the necessary input, output, and control lines.
Sketch a 4X4 ROM using one 2x4 AND DECODER and four multi-input OR gates. The data to be stored in your ROM is given in the table below. (^) Ht'"' 0 ton,,,3 tn, (^) W, M 0 00 0 0 l 1
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ECE 367 Final Exam (^) Fall 2002
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ECE 367 Final Exam^ Fall 2002
Cycles Cycle No.^ Address^ BUS^ R/W^ Data^ BUS
Peripheral A is connected to PORTC of a 68HCll MCU for parallel input into the MOU. The MCU is setup for pulsed handshake operation. Give the step by step operations that take place for a complete one byte transaction.
Sketch a "typical" serial signal frame. Label all significant components.
If a square wave is used as a ~bit clock" for the clocking of serial data at 9600 baud then what would be the length of time for the mGH part of one cycle of the bit clock.
PORTC of the 68HCll can be used 88 a temporary storage location for one byte of data. Explain how you would go about doing this. Just explain, no code necessary.
Label the timing diagrams below to indicate which is for PORTB Address lines, E CLOCK, AS
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20 Design a circuit that will allow the output of a ten volt CMOS device (which can source I.5mA wax.) to interface to the input of a fifteen volt CMOS device (that can sink 0mA current.)
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