


Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Main points of this past exam are: ANSI Symbol, Two Input, Gates Complete, Variables, Logic Function, Simplest Logic Circuit, Function
Typology: Exams
1 / 4
This page cannot be seen from the preview
Don't miss anything!



(NFQ Level 8)
Answer six questions – three from each section.
Use separate answer books for each Section.
Please note: all questions carry equal marks.
Internal Examiners: Dr R.A. Guinee Dr M.N. Barry Prof. M. Gilchrist Mr. J. Hegarty
Q1. (a) Draw the ANSI symbol for a two input NAND, OR and EXOR gates complete with truth tables in each case. (5.66%) (b) State De Morgan’s Laws for a logic function with three variables and prove these using Truth Tables. (5 %) (c) Draw the simplest logic circuit to perform the following function using NAND gates only: F = A C D.. + A B D.. + A C D.. (6 %) [16.67 marks]
Q2. (a) Write a minimum sum of products expressions for the Karnaugh map of the logic switching operation in Fig. Q2. (4.67%)
(b) Minimise the Boolean expression: F = A B C.. + A B C.. + A B C.. + A B C.. + A B C.. by means of (i) Boolean reduction and (ii) Karnaugh map. Which do you think is the easiest method to use? (8%) (c) Draw the logic circuit of the minimized expression in part (b) of your answer. (4%) [16.67 marks]
Q3. (a) Draw the logic circuit of a clocked SR flip flop using NAND gates. Examine the response of the flip flop via a truth table for the various input combinations and comment. What is the role of the clock input in such a circuit and point out any difficulties in circuit operation? (6%) (b) Draw the logic circuit diagram of a JK Flip Flop and complete it's truth table. What operational feature does the JK flip flop have over that of the SR device? (6%) (c) Draw the block schematic of a 4 stage serial in – parallel out shift register using D flip flops. Examine the operation of the shift register using a state table for each stage in the loading of the binary number 1011. (4.67%) [16.67 Marks]
Fig Q
Q6. (a) Derive the expression (^ ) [^1 ] i t = (^) RV^ − e − t /(^ L / R ) for the instantaneous current in an inductive- resistive circuit when switched across a direct voltage source, V. [7 marks] (b) Graph the current wave shape and show the time contact on it. [5 marks (c) A relay of inductance 2H and resistance 100 Ω has an operating current of 25mA. If the relay is connected to a DC supply of 5V, calculate: (i) the time constant [2 marks] (ii) the operating lag of the relay. [2 marks] (iii) the final current [2 marks] (iv) the energy stored in the relay’s magnetic field. [2 marks]
Q7. (a) State (i) Kirchhoff’s laws, and (ii) Thevenin’s theorem. [4 marks] (b) Using either Kirchhoff’s laws (mesh laws), or Thevenin’s theorem find the currents through each resistor in the circuit in Fig.Q(7), below. [16 marks]
2 Ω
1Ω 13 V^ 12 V
1Ω
Fig. Q(7)
Q8. (a) Prove that the maximum power is transferred to a load, when the load impedance is the same as the generator impedance. [8 marks] (b) What is meant by the power factor of a circuit? [4 marks] (c) An R-L 100W load, with values R=4W and L=20mH is connected to a 50Hz supply. What is (i) The voltage of the supply? [4 marks] (ii) The circuit power factor? [4 marks]