Basic Sequential Components - Computing System - Lecture Slides, Slides of Computer Science

Download Basic Sequential Components - Computing System - Lecture Slides and more Slides Computer Science in PDF only on Docsity!

Basic Sequential Components

CT101 – Computing Systems

Organization

Overview

• The most fundamental sequential

components are the latch and flip-flop

• They store one bit of data and make it

available to other components

• The main difference between a latch and a

flip-flop is that the first are level triggered

and the latter are edge triggered

• Flip-flops and latches have a clock input

D flip-flop

• Flip-flop:
  • One data input D
  • When the clock input changes from 0 to 1 (positive edge), the data on the D input is loaded
  • The data is made available via output Q and its complement via Q’
  • Some variations have also a load signal (LD) that has to be high (active) in order for data to be loaded into the flip-flop

D latch

• Positive level triggered latch
• It loads data as long as both its clock and load signals are 1. If both are one, the value of data D is passed to the Q output. If D changes while clock and load are 1, then the output changes accordingly
• If either the clock or load signals go to 0, the Q value is latched and held

SR latch

• The S input sets the latch to 1 and the R input resets the latch to 0
• When both S and R are 0 the output remains unchanged
• Doesn’t have a clock input
• The output of the latch is undefined when both the S and R are 1; the designer has to ensure that S and R inputs are never set to 1

JK flip-flop

• Resolves the problem of undefined outputs associated with SR latch
• J=1 sets the output to 1 and K=1 resets the output to 0. JK=11 inverts the stored current value of the output
• It is often used instead of SR latch

Observations

• All of the flip-flops and latches shown so

far are positive edge triggered or positive

level triggered. They also have active high

load, set and clear inputs.

• It is possible for those components to be

negative edge triggered or negative level

triggered and have active low control

signals as well.

• Flips-flops and latches can be combined in

parallel to store data with more than one bit

4 bit D flip-flop

• Control signals are tied together
• Act as one unified data register
• They usually output only the data (not the complement of the data as the 1 bit flip-flops) Docsity.com

Up/down counter with parallel load

• Ability to load external data as well as count
• Down counter decrements its value rather than increment and generates a borrow rather than a carry out
• Up/down counter can do both operations according with the signal U/D’

Shift Registers

• Can shift its data one bit position to the right or left
• It is useful for hardware multipliers/dividers
• It may shift left, right or both directions under certain control conditions (like the up/down counter)

PLA

• The inputs and their complements are made available to several AND gates.
• An X indicates that the value si input to the AND gate
• The output from the AND gates are input into the OR gates, which produce the chip’s outputs
• Functions:
  • b = X2’ + X1’X0’+X1X
  • c = X2 + X1’ + X
• Simulator

PAL

• P rogrammable A rray of L ogic – its OR blocks are not programmable
• Certain AND gates serve as input to specific OR gates
• Same b and c function implementation: - b = X2’ + X1’X0’+X1X - c = X2 + X1’ + X
• PLA and PAL are limited because they can implement only combinatorial logic, they don’t contain any latches nor flip-flops

CPLDs

• Array of PLDs
• Has global

routing resources for connections between PLDs and between PLDs to/from IOs

FPGAs

• F ield P rogrammable G ate A rray is one of the most powerful and complex programmable circuit available
• Contain an array of cells, each of which can be programmed to realize a function
• There are programmable interconnects between the cells, allowing connect to each other
• Includes flip-flops allowing the design and implementation of complex sequential circuit on a chip (of a complexity of a processor)
• Often contains the equivalent of 100k to a few million simple logic gates on a single chip