Code Generation II - Lecture Slides - Fall 2002 | EECS 583, Study notes of Electrical and Electronics Engineering

Material Type: Notes; Professor: Mahlke; Class: Advanced Compilers; Subject: Electrical Engineering And Computer Science; University: University of Michigan - Ann Arbor; Term: Winter 2002;

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EECS 583 – Lecture 13
Code Generation II
University of Michigan
February 20, 2002
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EECS 583 – Lecture 13 Code Generation II

University of Michigan February 20, 2002

From last time - Dependences Dependences define precedence relations among operations for scheduling

Reg-output

Reg-anti

Reg-flow

r1 = r2 + r3r1 = r4 * 6

r1 = r2 + r3r2 = r5 * 6

r1 = r2 + r3r4 = r1 * 6

Mem-output

Mem-anti

Control (C1)

Mem-flow

r2 = load(r1)store (r1, r3)

store (r1, r2)store (r1, r3)

if (r1 != 0)

r2 = load(r1)

store (r1, r2)r3 = load(r1)

Dependence edge latencies^ Y

Edge latency

= minimum number of cycles necessary

between initiation of the predecessor and successor inorder to satisfy the dependence

Y^

Register flow dependence, a

Æ

b

»^

Latest_write(a) – Earliest_read(b)

Y^

Register anti dependence, a

Æ

b

»^

Latest_read(a) – Earliest_write(b) + 1

Y^

Register output dependence, a

Æ

b

»^

Latest_write(a) – Earliest_write(b) + 1

Y^

Negative latency^ »

Possible, means successor can start before predecessor » We will only deal with latency >= 0

Dependence edge latencies (2)^ Y

Memory dependences, a

Æ

b (all types, flow, anti, output)

»^

latency = latest_serialization_latency(a) –earliest_serialization_latency(b) + 1

»^

Prioritized memory operations^ y^

Hardware orders memory ops by order in MultiOp y^

Latency can be 0 with this support

Y^

Control dependences^ »

branch

Æ

b

y^

Op b cannot issue until prior branch completed y^

latency = branch_latency

»^

a^ Æ

branch

y^

Op a must be issued before the branch completes y^

latency = 1 – branch_latency (can be negative) y^

conservative, latency = MAX(0, 1-branch_latency)

Dependence graph properties - Estart^ Y

Estart = earliest start time, ASAP^ »

Schedule length with infinite resources (dependence height) » Estart = 0 if node has no predecessors » Estart = MAX(Estart(pred) + latency) for each predecessornode » Example

Lstart^ Y

Lstart = latest start time, ALAP^ »

Latest time a node can be scheduled s.t. sched length notincreased beyond infinite resource schedule length » Lstart = Estart if node has no successors » Lstart = MIN(Lstart(succ) - latency) for each successor node » Example

Critical path^ Y

Critical operations = Operations with slack = 0^ »

No mobility, cannot be delayed without extending theschedule length of the block » Critical path = sequence of critical operations from node withno predecessors to exit node, can be multiple crit paths

Class problem (2)

Node

Estart

Lstart

Slack

Critical path(s) =

Height-based priority^ Y

Height-based is the most common^ »

priority(op) = MaxLstart – Lstart(op) + 1

1 4, 4^2

op

priority

List scheduling (cycle scheduler)^ Y

Build dependence graph, calculate priority

Y^

Add all ops to UNSCHEDULED set

Y^

time = -

Y^

while (UNSCHEDULED is not empty)^ »

time++ » READY = UNSCHEDULED ops whose incoming dependenceshave been satisfied » Sort READY using priority function » For each op in READY (highest to lowest priority)

y^

op can be scheduled at current time? (are the resources free?)^ X^

Yes, schedule it, op.issue_time = time^ ±

Mark resources busy in RU_map relative to issue time ± Remove op from UNSCHEDULED/READY sets X^

No, continue

Cycle scheduling example (2)

RU_map

Schedule

3m

5m 2

2m

time ALU MEM 0 1 2 3 4 5 6 7 8 9

time

Ready

Placed

op^

pr 1

7m

Cycle scheduling example (3)

3m

5m 2

Schedule

2m

op^

pr 1

time

Ready

Placed

7m

Operation scheduling example (1)

RU_map

Schedule

3m

5m 2

2m

time ALU MEM 0 1 2 3 4 5 6 7 8 9

time

Ready

Placed

op^

pr 1

7m

Operation scheduling example (2)

3m

5m 2

Schedule

2m

op^

pr 1

time

Placed

7m