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Computer architecture is a science that determines how a computer works, including the structure of a computer system, the instruction set architecture, and the microarchitecture. It covers topics such as the von neumann architecture, registers, system buses, memory subsystems, input/output subsystems, the arithmetic logic unit (alu), and the control unit (cu). A detailed overview of these key components of computer architecture, explaining their functions and how they work together to execute programs. It also discusses instruction set design, including the differences between reduced instruction set computers (risc) and complex instruction set computers (cisc), as well as the fetch-execute cycle that underlies program execution. Overall, this document offers a comprehensive introduction to the fundamental principles and concepts of computer architecture, making it a valuable resource for students and professionals interested in understanding the inner workings of computer systems.
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๐ก Computer Architecture โ A science which determines how a computer works โ A set of rules that state how computer hardware and software work together to make a computer work โ A description of the structure of a computer system โ Three main categories: โ System design โ (actual computer system) includes hardware parts: CPU, data processors, multiprocessors, memory controllers, direct memory access โ Instruction set architecture (software that runs a computer) โ includes a CPUโs functions and capabilities, programming languages, processor register types and instructions. โ Microarchitecture (this defines the data processing and storage element or data paths) โ includes storage devices and related computer organisation. ๐ก The Von Neumann Architecture (stored program concept) Three Characteristics for designing and building computers:
๐ก Main components of the processor (CPU) Component Description Arithmetic Logic Unit (ALU) > Allows the required arithmetic or logic operations
A computer can have more than 1 ALU Control Unit (CU) > Reads an instruction from memory Instruction is then interpreted Ensures synchronisation of data flow and program instructions throughout the computer System Clock > Used to produce timing signals on the control bus โ Ensures synchronisation Computer would crash without it Immediate Access Store (IAS) > Holds all data and programs @ Primary (RAM) memory
๐ก Memory subsystem โ Also called RAM (Random access memory) โ Consists of many memory cells (storage units) of a fixed size โ Each cell has an address associated with it โ All accesses to memory are to a specified address โ A cell is the minimum unit of access โ The time it takes to fetch/store a cell is the same for all cells โ When a computer is running, both: โ Program โ Data (variables) ...are stored in the memory ๐ก RAM โ Needs to distinguish between the address and content of a memory cell โ Memory width ( W ): โ each memory cell contains 8 bits โ Address width ( N ): โ Number of bits = maximum memory size ??? address space โ If address width is N-bits, then the address space is 2N(0,1,..,2(N-1) ) ๐ก Memory size/speed โ Typical memory in a personal computer (PC): 64 MB โ 256 MB โ Memory sizes Kilobyte (KB) = 210 bytes Megabyte (MB) = 220 bytes Gigabyte (GB) = 230 bytes โ Memory Access time: 50-75 nanoseconds
(1) Operations on Memory โ Fetch (address) โ Fetch a copy of the content of a memory cell with a specific address. โ Non-destructive, copies value in memory cell. โ Store (address, value) โ Stores the specific value into the memory cell with a specific address. โ Destructive, overwrites the previous value of the memory cell. The memory system is interfaced via: โ MAR โ MDR โ Fetch/Store signal Structure of the memory subsystem โ Fetch (address) โ Loads address into MAR โ Decode address in MAR โ Copies the content of the memory cell with specified address into MDR. โ Store (address, value) โ Loads address into MAR โ Loads value into MDR โ Decodes address in MAR โ Copy the content of MDR into the memory cell with the specified address.
(3) The ALU Subsystem โ The ALU performsโฆ โ Mathematical operations โ Logic operations โ In todayโs computers integrated into the CPU consists of: a. Circuits to do the arithmetic/ logic operations b. Registers to store the results c. Bus that connects the two Structure of the ALU โ ALU circuitry: โ Contains an array of circuits to do mathematical operations โ Registers: โ Very fast local memory cells that store operands of operations and intermediate results. โ Condition code register (CCR), a special purpose register that stores the results of <, =, > operations. โ Bus: โ Data path interconnecting the registers to the ALU circuitry.
(4) The Control Unit (CU) โ Program is stored in memory as machine language instructions (in binary) โ The task of the control unit is to execute programs by repeatedly: โ Fetch the next instruction to be executed from memory. โ Decode it, determine what is to be done. โ Execute it by issuing appropriate signals to the ALU, memory and I/O subsystems. โ Continue until the HALT instruction. Structure of the control unit โ PC (program counter) โ Stores the address of the next instruction that is to be fetched โ IR (instruction register) โ Stores the instruction fetched from memory โ Instruction decoder: โ Decodes instruction and activates the necessary circuitry
How does this all work together? Program execution: โ The PC is set to the address where the first instruction is stored in memory. โ Repeat until HALT instruction or fatal error Fetch instruction Decode instruction Execute instruction End of loop
Use of interrupts in fetch-execute cycle โ A special register called interrupt register is used โ If interrupt occurs during fetch-execute cycle, status changes occur in interrupt register