Computer Architecture - Advance Computers Architectures - Lecture Slides, Slides of Computer Architecture and Organization

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Advanced Computer Architecture

Lecture 1 - Introduction

Outline

• Computer Science at a Crossroads
• Computer Architecture v. Instruction Set Arch.
• What Computer Architecture brings to table

Crossroads: Uniprocessor Performance

• VAX : 25%/year 1978 to 1986
• RISC + x86: 52%/year 1986 to 2002
• RISC + x86: ??%/year 2002 to present

From Hennessy and Patterson, Architecture: A Quantitative Approach Computer , 4th edition, October, 2006

Sea Change in Chip Design

• Intel 4004 (1971): 4-bit processor, 2312 transistors, 0.4 MHz, 10 micron PMOS, 11 mm 2 chip - Processor is the new transistor?
• RISC II (1983): 32-bit, 5 stage pipeline, 40,760 transistors, 3 MHz, 3 micron NMOS, 60 mm^2 chip
• 125 mm^2 chip, 0.065 micron CMOS = 2312 RISC II+FPU+Icache+Dcache - RISC II shrinks to ~ 0.02 mm 2 at 65 nm - Caches via DRAM or 1 transistor SRAM (www.t-ram.com)? - Proximity Communication via capacitive coupling at > 1 TB/s ?(Ivan Sutherland @ Sun / Berkeley)

Problems with Sea Change

• Algorithms, Programming Languages, Compilers, Operating Systems, Architectures, Libraries, … not ready to supply Thread Level Parallelism or Data Level Parallelism for 1000 CPUs / chip,
• Architectures not ready for 1000 CPUs / chip
  • Unlike Instruction Level Parallelism, cannot be solved by just by computer architects and compiler writers alone, but also cannot be solved without participation of computer architects
• 4 th^ Edition of textbook Computer Architecture: A Quantitative Approach explores shift from Instruction Level Parallelism to Thread Level Parallelism / Data Level Parallelism

Classes of Computers

• Personal Mobile Device (PMD)
  • e.g. start phones, tablet computers
  • Emphasis on energy efficiency and real-time
• Desktop Computing
  • Emphasis on price-performance
• Servers
  • Emphasis on availability, scalability, throughput
• Clusters / Warehouse Scale Computers
  • Used for “Software as a Service (SaaS)”
  • Emphasis on availability and price-performance
  • Sub-class: Supercomputers, emphasis: floating-point performance and fastinternal networks
• Embedded Computers
  • Emphasis: price

Example: MIPS

r0^0 r1° °° r PC lo hi

Programmable storage 2^32 x bytes 31 x 32-bit GPRs (R0=0) 32 x 32-bit FP regs (paired DP) HI, LO, PC

Data types? Format? Addressing Modes?

Arithmetic logical Add, AddU, Sub, SubU, And, Or, Xor, Nor, SLT, SLTU, AddI, AddIU, SLTI, SLTIU, AndI, OrI, XorI, LUI SLL, SRL, SRA, SLLV, SRLV, SRAV Memory Access LB, LBU, LH, LHU, LW, LWL,LWR SB, SH, SW, SWL, SWR Control J, JAL, JR, JALR BEq, BNE, BLEZ,BGTZ,BLTZ,BGEZ,BLTZAL,BGEZAL

32-bit instructions on word boundary

Instruction Set Architecture

“... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” – Amdahl, Blaauw, and Brooks, 1964

SOFTWARE -- Organization of ProgrammableStorage -- Data Types & Data Structures:Encodings & Representations -- Instruction Formats -- Instruction (or Operation Code) Set -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions

Comp. Arch. is an Integrated Approach

• What really matters is the functioning of the complete system - hardware, runtime system, compiler, operating system, and application - In networking, this is called the “End to End argument”
• Computer architecture is not just about transistors, individual instructions, or particular implementations - E.g., Original RISC projects replaced complex instructions with a compiler + simple instructionsDocsity.com

Computer Architecture is

Design and Analysis

Design

Analysis

Architecture is an iterative process:

• Searching the space of possible designs
• At all levels of computer systems

Creativity

Good Ideas Mediocre Ideas

Bad Ideas

Cost / Performance Analysis

Related Courses

CIS 580 CIS 600

CIS 650

How to build it Implementation details

Why, Analysis, Evaluation

Alternative Course Compilers

Strong Prerequisite

Basic knowledge of the organization of a computer is assumed!

What Computer Architecture brings to Table

• Other fields often borrow ideas from architecture
• Quantitative Principles of Design
  1. Take Advantage of Parallelism
  2. Principle of Locality
  3. Focus on the Common Case
  4. Amdahl’s Law
  5. The Processor Performance Equation
• Careful, quantitative comparisons
  • Define, quantity, and summarize relative performance
  • Define and quantify relative cost
  • Define and quantify dependability Docsity.com

Pipelined Instruction Execution

I n s t r.

O r d e r

Time (clock cycles)

Ifetch Reg ALU DMem Reg

Ifetch Reg ALU DMem Reg

Ifetch Reg ALU DMem Reg

Ifetch Reg ALU DMem Reg

Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7

Limits to pipelining

• Hazards prevent next instruction from executing during its designated clock cycle - Structural hazards: attempt to use the same hardware to do two different things at once - Data hazards: Instruction depends on result of prior instruction still in the pipeline - Control hazards: Caused by delay between the fetching of instructions and decisions about changes in control flow (branches and jumps).

I n s t r. O r d e r

Time (clock cycles) Ifetch Reg ALU DMem Reg Ifetch Reg ALU DMem Reg Ifetch Reg ALU DMem Reg Ifetch Reg ALU DMem Reg