6811 Programming Model: Instruction Set and Branching, Study notes of Electrical and Electronics Engineering

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6811 Programming Model

6811 Programming Model

Branch Instructions

Branch Instructions

Condition Code Register

Condition Code Register Comparison Instructions

Comparison Instructions

2

Review 1

Review 1

Simplified

Simplified

8-bit Accumulators A

A & B

B

7

A

0

7

B

0

15

D

0

16-bit Accumulator D

15

PC

0

Program CounterProgram Counter

H H

N N

Z Z

V V

C C

Condition CC

Code R

Register

CC

arry/borrow (MSB)

oV

V

erflow (2s C)

Z Z

ero

NN

egative

HH

alf carry (bit 3

→

4),(BCD)

Review 3

Review 3

Simple Fictional Machine - Registers

Simple Fictional Machine

Simple Fictional Machine

Registers

Registers

Mnemonic

Operation

Op-code

LOAD

mem -> AC

00

STORE

AC -> mem

01

ADD

AC + mem -> AC

10

BRN

IF AC<15> =1 THEN qhhh -> PC

11

What

registers

do we

need?

16-bit Accumulator14-bit Program Counter

15

AC

0

13

PC

0

What

registers

do we

need?

Review 4: N1 + N Review 4: N1 + N

→ →

SUM SUM

6811 Program fragment

6811 Program fragment

...

...

LDAA

$C

B

$C

C

$C

10

ADDA

$C

BB

$C

C

$C

11

STAA

$C

B

$C

C

$C

12

HALT

$C

3F

...

...

N

$C

12

N

$C

34

SUM

$C

FF

...

...

C

20

PC

A B

Let's go through it

instruction by instruction

Let's go through it

instruction by instruction

What’s Different?

What’s Different?

Bytes

Machine Code

Source

Form BRA

Branch Always

REL

REL

rr

JMP

Jump

See Special

EXT

7E

hh ll

Operations

IND,X

6E

ff

IND,Y

18 6E

ff

Addressing Addressing

Mode for Mode for

Operand Operand

Boolean

Expression

Operation

Opcode Operand

Relative to what?

Relative to what?

This is a new

addressing mode

Relative addressing

This is a new

addressing mode

Relative addressingRelative addressing

Relative Addressing

Relative Addressing

In this mode, addresses are specified relative to the program counter Also known as PC-relative addressing

Example:

BRA $

Program branches to address (PC + $28)

Relative

Offset

Relative

Offset

To figure out this address, we need to know the value in the PC. Where is the instruction located in memory? BRA is a 2-byte instruction. After the instruction is fetched,

PC = $6142 + $02 = $6144.

Therefore,

PC + $28 = $6142 + $28 = $616A.

Inherent Addressing Mode

Inherent Addressing Mode

Instructions with No Operands

Instructions with No Operands

Some of the instructions that have no operand:

ABA

A + B

A

CLRB

B

INCA

A + 1

A

DECB

B - 1

B

SEC

C (C = CCR<0>)

Lec

Lec

. Exercise 1

. Exercise 1

Translate the following pseudo-code program into M6811machine code. The programs starts at address $6000. Usethe SWI instruction to HALT the program.

$B

IX;

$0A

ACCA;

L1:

ACCA - 1

ACCA;

IX - 1

IX;

M(IX + 0);

if (ACCA

1. then go to L1 else HALT;

Answer

Answer

Condition Code Register

Condition Code Register

H H

N N

Z Z

V V

C C

Condition CC

Code R

Register

CCarry/borrow (MSB)oV

Verflow (2s C)

ZZeroNNegativeHalf carry from (bit 3H

to

4), used

for (BCD) corrections only

These CCR bits are set by

ALU operations

These CCR bits are set by

ALU operations

Simple Branches

Simple Branches

Test only 1 or 0

Test only 1 or 0

Source

Form

Operation

Boolean

Expression

Opcode

BRA (opr)

Branch Always

BRN (opr)

Branch Never

Signed Conditional Branches Signed Conditional Branches

Test combinations of N, Z and V

Test combinations of N, Z and V

Source

Form

Operation

Boolean

Expression

Opcode

BGT (opr)

Branch if > Zero

?Z + (N

V) = 0

2E

BLE (opr)

Branch if <= Zero

?Z + (N

V) = 1

2F

BGE (opr)

Branch if >= Zero

?N

V = 0

2C

BLT (opr)

Branch if < Zero

?N

V = 1

2D

Unsigned Conditional Branches Unsigned Conditional Branches

Test combinations of Z and C

Test combinations of Z and C

Source

Form

Operation

Boolean

Expression

Opcode

BHI (opr)

Branch if Higher

?C + Z = 0

BLS (opr)

Branch if Lower or Same

?C + Z = 1

BHS (opr)

Branch if Higher or Same

?C = 0

BLO (opr)

Branch if Lower

?C = 1

• Same Opcode as BCC ** Same Opcode as BCS

Comparison Instructions Comparison Instructions

8 Bit Comparisons

8 Bit Comparisons

CMPA (opr)

Compare A to Memory

A - M

IMM

DIR

EXT

B

IND,X

A

IND,Y

18 A

CMPB (opr)

Compare B to Memory

B - M

IMM

C

DIR

D

EXT

F

IND,X

E

IND,Y

18 E

Boolean

Expression

Addr

Mode

Operation

Opcode

Source Form

Comparison Instructions Comparison Instructions

16 Bit Comparisons

16 Bit Comparisons

Boolean

Expression

Addr

Mode

Operation

Opcode

Source Form

CPD (opr)

Compare D to Memory

D - M:M+

IMM

1A 83

DIR

A 93

EXT

1A B

IND,X

1A A

IND,Y CD A

CPX (opr)

Compare X to Memory

X - M:M+

IMM

8C

DIR

C

EXT

BC

IND,X

AC

IND,Y

CD AC

CPY (opr)

Compare Y to Memory

Y - M:M+