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Cork Institute of Technology
Higher Certificate in Engineering in Electronic Engineering – Stage 1
(NFQ Level 7)
Summer 2006
Digital Systems
(Time: 3 Hours)
Answer any five questions [20 marks each] Maximum available marks is 100
Examiners: Mr. J. J. O’Sullivan Mr. J. Berry Dr. R. Ó Dúbhghaill
Q1 (a) By means of a truth table show that ( A + B )( A + C )= A + BC [3 marks]
(b) Use Boolean algebra to minimise the following expressions: (i) X = BAC + CBA + CBA + BCA
(ii) Y = AB ( B + AC ) [8 marks]
(c) Use a K-map to minimise the following expression: Z = ABCD + BCD + ABCD + ABCD + ACD + ABC D [7 marks]
(d) Using a truth table, identify the basic logic gate represented by the following symbol:
[2 marks]
Q2 (a) What is meant by edge-triggering as applied to flip-flops? [1 mark]
(b) Draw a logic symbol and truth table for a negative edge-triggered S-R flip-flop. [4 marks]
(c) Draw a logic diagram of the above flip-flop. With the aid of an additional simple circuit, explain clearly how edge triggering could be facilitated. [8 marks]
(d) Complete the timing diagram, Figure 1 on the Return Sheet, for the flip-flop in (c) above. [5 marks]
(e) What modification should be made to the circuit in (c) to convert it to a D-type flip-flop? [2 marks]
Q3 An aircraft is designed to fly under computer control. When the aircraft is coming in to land, the computer will sense the output ( Z ) from a logic circuit which has the following inputs from sensors: speed of approach (A) angle of descent (B) distance from runway (C). The computer will lower the wheels if the distance from the runway and the angle of descent or the aircraft speed and distance from the runway are acceptable.
For the logic circuit specified above:
(a) draw a block diagram and derive a complete truth table [3 marks]
(b) from the truth table, obtain a sum-of-products (SOP) expression [3 marks]
(c) minimise as far as possible the SOP expression above [3 marks]
(d) for the minimised expression, draw a basic logic circuit [3 marks]
(e) convert the basic circuit to one using (i) NAND gates only, (ii) NOR gates only, and state with reason, which version you would build in practice. [8 marks]
Q4 (a) What is the difference between an encoder and a decoder? [2 marks]
(b) Draw the logic symbol and truth table for a simple 2-to-4-line binary decoder and briefly describe the action of this circuit. [4 marks]
(c) Using Boolean equations or otherwise, draw a logic diagram showing the full circuit details of the decoder in (b) above. [6 marks]
(d) An input labelled EN is commonly found on such circuits. Describe how this input would affect the circuit. [3 marks]
(e) On the timing diagram for the decoder circuit, Figure 2 on the Return Sheet, clearly label the inputs and outputs as per your logic symbol in (b), and then complete the waveforms for the circuit. [5 marks]
Q6 (a) Describe briefly what is meant by a shift register. [2 marks]
(b) A universal shift register is capable of carrying out the following shift register functions: SISO, SIPO, PISO and PIPO. Using simple block diagrams, explain each of these abbreviations. [4 marks]
(c) Draw a full logic diagram of a circuit capable of carrying out one of the shift register functions in (b) above. [5 marks]
(d) Figure 4 is a pinout diagram of the 74LS194 universal 4-bit shift register that we encountered in the FACET lab. Use this diagram to help you draw a functional block diagram of the chip, complete with pin numbers, with inputs and outputs grouped in the most appropriate and logical order. [4 marks]
(e) With the aid of the accompanying truth table, explain how each of the shift register functions, SISO, SIPO, PISO and PIPO can be facilitated by this universal shift register chip. [5 marks]
16 15 14 13 12 11 10 9
1 2 3 4 5 6 7 8
B C D SL
S
SR A
QA S CLR
QB QC QD CLK
S1 S
Function Inhibit Right Left Load
Figure 4
Bachelor of Engineering in Electronic Engineering
DIGITAL SYSTEMS
Summer 2006
RETURN SHEET
Negative edge-triggered S-R Flip-flop - Q2(d)
Figure 1
2-4-Line Binary Decoder - Q4(e)
Figure 2
Name:____________________ Return with your answer book.
CLK
S
R
Q
Q
EN
Inputs
Outputs
