Encoder-Digital Logic Design-Lecture Slides, Slides of Digital Logic Design and Programming

Prof. Sourabhi Kapoor delivered this course at Bengal Engineering and Science University. This lecture covers following points for Digital Logic Design course: Encoder, Input, Active, time, Outputs, Decoding, Line, Priority, Decimal, Inverted

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7/18/2012 EET 2544 Chapter 9 16
9-4 Encoders
Has several inputs only of
which one is usually active
at a time.
Produces an N-bit output
code dependent upon
which input is activated.
(opposite of decoding)
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7/18/2012 EET 2544 Chapter 9 16

9-4 Encoders

• Has several inputs only of which one is usually active

at a time.

• Produces an N-bit outputcode dependent upon

which input is activated. (opposite of decoding)

7/18/2012 EET 2544 Chapter 9 17

8-Line-To-3-Line Encoder

Note that A Only one input should be low. Example: If A Q 0 is not internally connected (A 1 …A 3 = A 7 =1111111, then Q 5 =0, and all other are High, then 2 Q 1 Q 0 = 2 Q 1 Q 0 =011 2 (=3 10 ), NOT ACCEPTABLE

7/18/2012 EET 2544 Chapter 9 19

9-4 Priority Encoders

74147 decimal-to-BCD priority encoder.

  • • Nine active low inputs representing decimal 1 thru 9Output: inverted BCD code corresponding to the highest numberedactivated input. Outputs can be converted to normal BCD by putting
  • each through an inverter.No A 0. When all inputs are high, it corresponds to decimal 0

7/18/2012 EET 2544 Chapter 9 20

The 74147 as a Decimal-to-BCD switch encoder^ 9-4 Priority Encoders

  • Example: a keyboard switch
  • or a calculatorSimultaneous key depressions will produce the BCD code for thehigher-numbered key.

7/18/2012 EET 2544 Chapter 9 22

9-5 Troubleshooting

• More complex circuitry increases possible reasons for failure

• Applying observation and analysis will narrow the focus and simplify testing

• After using observation and analysis todetermine the possible faults, repeatedly use the

divide and conquer technique to reduce possible causes by half.

7/18/2012 EET 2544 Chapter 9 23

9-6 Multiplexers (Data Selectors)

• A multiplexer (MUX) selects one of multiple input signals and passes it to the output.

• • The basic two input multiplexerThe four input multiplexer

• • The eight input multiplexerThe quad two input MUX (74ALS157/HC157)

7/18/2012 EET 2544 Chapter 9 25

9-6 Multiplexers

Two-input multiplexer

7/18/2012 EET 2544 Chapter 9 26

9-6 Multiplexers

Four-input multiplexer

Four-input multiplexer: (a) using sum of products logic; (b) using tristate buffers.

7/18/2012 EET 2544 Chapter 9 28

9-6 Multiplexers

Eight-input multiplexer: The 74151

7/18/2012 EET 2544 Chapter 9 29

9-6 Multiplexers

two 74HC151scombined to form

a 16-input multiplexer