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4 problems, 4 pages Exam Two Solution 10 March 2010 Problem 1 (3 parts, 24 points) Decoding Decoders Part A (6 points) Define a 1 to 2 decoder by completing the behavior table. IN EN O0 O X 0 0 0 0 1 1 0 1 1 0 1 IN EN O O 1 to 2 decoder Part B (8 points) Implement a 1 to 2 decoder using basic gates. Assume only true (non- complemented) inputs are available. Label all inputs and outputs. Part C (10 points) Using only the three 1 to 2 decoders shown below, implement a 2 to 4 decoder with an enable. Label the decoder inputs (IN 1 , IN 0 , EN) and outputs (O0, O1, O2, O3). IN EN O O 1 to 2 decoder IN EN O O 1 to 2 decoder IN EN O O 1 to 2 decoder O O O O IN IN EN
4 problems, 4 pages Exam Two Solution 10 March 2010 Problem 2 (2 parts, 18 points) "Get your priorities right!" Consider a priority encoder with the following behavior: In 3 In 2 In 1 In 0 Valid O 1 O 0 0 0 0 0 0 X X X X X 1 1 0 0 X X 1 0 1 0 1 X 1 0 0 1 1 0 1 0 0 0 1 1 1 Part A (8 points) List the inputs (In 0 , In 1 , In 2 , and In 3 ) in increasing priority.
In 3 <^ In 2 <^ In 1 <^ In 0
lowest priority 3 rd^ highest priority 2 nd^ highest priority highest priority Part B (10 points) Express the behavior of O 0 in the map below. Derive a simplified sum of products expression using a Karnaugh Map. Circle and list the prime implicants, indicating which are essential. Then write the simplified SOP expression.
X 1 1 1
In 0 In 0 In 1 In 1 In 2 In 2 In 2 In 3 In 3 In 3 prime implicants essential? yes no In 0 In 2 In 0 In 1
O 0 = In0 ⋅^ In1 In2^
4 problems, 4 pages Exam Two Solution 10 March 2010 Problem 4 (3 parts, 18 points) "Does this register?" Part A (6 points) Express the behavior of the circuit below. Use standard symbols (0, 1, X, Z 0 , Q 0 , etc.). Then name the circuit. A B X Y
0 0 Q 0 Q 0
1 0 Q 0 Q 0
This circuit is a Transparent Latch Part B (6 points) Implement a register below using only latches, pass gates, and inverters (all in icon form). Complete the behavior table at right. Recall that the CLK signal indicates a full Φ 1 Φ 2 cycle; so the output should be the value at the end of a cycle (for the given inputs). Out In φ^1 φ^2 In Out En Latch WE In Out En Latch Out (^) Out Part C (6 points) Assume the following signals are applied to your register. Draw the output signal Out. Draw a vertical line where In is sampled. Draw crosshatch where Out is unknown. Φ^1 Φ^2 WE In Out In WE Clk Out Out
A 0 ↑↓ Q 0 Q 0
A 1 ↑↓ A A
