Exam 1 with Solution - Computer Organization | CMSC 311, Exams of Computer Architecture and Organization

Material Type: Exam; Class: COMPUTER ORGNIZATN; Subject: Computer Science; University: University of Maryland; Term: Spring 2001;

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CMSC311
Section
0201
Exam
1
Name
8
March
2001
100
points
(Please
print legibly)
The exam
has
14
questions
worth
a
total
of
100
points. The
point
value
of
each
question
is
indicated
preceding
the
question
number.
(4)
1.
Convert
.201
base
3
to
decimal.
You
may
leave
your
answer
in
fraction
form.
ii
-
=7^5
.201
base
3
=
=?7
-
{
J
decimal
(4)
2.
Convert
7.4
decimal
to
base
3.
Round your
answer
off
to
three
places
to
the
right
of
the
radix
point,
if
necessary.
7.4
decimal
=
base
3
Z-7
en
(9)
3.
Complete
the
following
table
for
the
4-bit
representations
(including
sign
bit).
Give
your
answers
in
decimal.
Largest
number
Most
negative
number
Number
of
distinct
numbers
4-bit
Sign
Magnitude
~7
_-jf
1$
4-bit
1's
Complement
^7
-""
i
c
'
--S
4-bit
2's
Complement
~1
<*~^
~~
O
/CD
—3
(3)
4.
Use
the
16
bits
provided
to
represent
-792
in
BCD
using
10's
complement.
?
ii^o^oo<io/
/
~
~r
~~{
'
T-
'
O
pf3
pf4
pf5

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CMSC311 Section 0201 Exam 1

Name

8 March 2001 100 points

(Please print legibly)

The exam has 14 questions worth a total of 100 points. The point value of each question is indicated preceding the question number.

(4) 1. Convert .201 base 3 to decimal. You may leave your answer in fraction form. ii - =7^ .201 base 3 = =?7 - { J decimal

(4) 2. Convert 7.4 decimal to base 3. Round your answer off to three places to the right of the radix point, if necessary.

7.4 decimal = base 3

Z-7 en

(9) 3. Complete the following table for the 4-bit representations (including sign bit). Give your answers in decimal.

Largest number

Most negative number Number of distinct numbers

4-bit Sign Magnitude ~

_-jf

1$

4-bit 1's Complement ^

-"" i

'^ •^ c --S

4-bit 2's Complement ~

~~ <*~^O

/CD

(3) 4. Use the 16 bits provided to represent -792 in BCD using 10's complement.

?

ii^o^oo<io// ~ ~r ~~{

' T- ' O

(10) 5. The single precision IEEE 754 standard is as follows:

  • 1 sign bit
  • 8-bit exponent in excess 127 format
  • 23-bit fraction, normalized, with a hidden 1
  • Exponents 00000000 and 1 1 1 1 1 1 1 1 are reserved
  • 'clean zero' is all zeroes in the exponent and fraction; the sign bit can be 0 or 1
  • 'dirty zero' is all zeroes in the exponent, a 0 or 1 in the sign bit, and the magnitude (denormalized) in the fraction with no hidden 1
  • Infinity is represented by all ones in the exponent, zeroes in the fraction, and the sign bit 0 or 1
  • Not a number (NaN) is represented by all ones in the exponent, the fraction is non zero, and the sign bit is 0 or 1

a. Convert the following decimal values to single precision IEEE 754 format

1.75=£> P2LI-L JJl

.01 5625 = O &/_ j_ i __ __ _ __ __ o ^-^ o o o » o o ooo o DO D o /

b. Convert the following from the IEEE 754 standard to decimal, infinity, or NaN

  • 5* S~ = j j oooOOOl 01100000000000000000000

/ -.~<i'( Z =

c. What is the largest gap between consecutive numbers?

d. Excluding clean zeores, dirty zeroes, infinity, and NaN representations, how many ''I/ numbers can be represented?

(8) 8. Show how the 4-to-l MUX below can be used to implement the following function

F(A,B,C) = 2(0,2,3,6)

C — (^) .JX) 01 10 11

/ Ho I

A B

46-) 9. Design a finite state machine (FSM) that reads binary input and creates output of 0 when the input bit matches the previous bit and an output of 1 otherwise.

o

(10) 10. Convert the following to binary, 8-bit representations using 2's complement for negatives. Perform the bit-wise addition. Indicate if overflow occurs. Convert subtraction to addition.

a. 96

Overflow? '

b. 96

1LLQ.OJ1Q

Overflow? /•* °

c. -

_/ / Po^v o o

Overflow? //o

o / / / 'I

(4) 11. Convert the following to binary, 8-bit representation using 1's complement for negatives. Perform the bit-wise addition. Indicate if overflow occurs. Convert subtraction to addition.

96

?'!••? .Pj

/! O O/

O

Overflow?

(10) 12. A serial multiplier operates through a series of shifts and additions. The multiplicand is stored in M and the multiplier in Q. C holds the carry bit from addition. A holds the partial sums. The final answer is in Q and A. If the least significant bit (LSB) in Q is a 1, then M is added to A; otherwise, M is not added. After the LSB of Q is checked, and M is, or is not, added to A, then C, A, Q are shifted to the right. The process is repeated until each bit in Q has been in the rightmost position. Show the results, and whether changes are due to an add or a shift, as the process is implemented with a multiplicand of 0110 and a multiplier of 1010. The initial values are provided. There may be more blank spaces than necessary.

M 0110

C A Q Add or shift? 0 £> c- o O O 0(0f ^r^'

A 0000

<_• ooa

0 1 i o O Q 1 1

O ( I I OQ ^-~\ J, 1 x———-

Q 1010 .0 J 3 i Pi Q i

£> PI 3

L j?o L

loo'

( i oo

_ _^

? O_!_ 1 <? Pi O 1 _ f'K- 1

O _ A • o

y

-i