Exam 2 with Solution - Computer Organization | CMSC 311, Exams of Computer Architecture and Organization

Material Type: Exam; Class: COMPUTER ORGNIZATN; Subject: Computer Science; University: University of Maryland; Term: Spring 2001;

Typology: Exams

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CMCS311
Section
0201
Exam
2
Name
19
April
2001
100
Points
(Please
print
legibly)
The
point
total
for
each
problem
precedes
the
problem
number.
To
ensure
full
credit
for
your
work,
please
place
all
answers
in
the
spaces
provided.
(8)
1.
Use the
formats
below
for
this
problem.
SETHH
format
Branch
format
CALL
format
Arithmetic
formats
Memory
formats
00
rd op2
imm22
00
0
cond
op2
disp22
01
disp30
10
rd
op3
rsl
0
00000000
rs2
10
rd
op3
rsl
1
simmlS
11
rd
op3
rsl
0
00000000
rs2
11
rd
op3
rsl
1
simm!3
op
Format
00
SETHI/branch
01
CALL
10
Arithmetic
1
1
Memory
op2
Inst.
010
branch
100
sethi
Op3
(op=10j
010000
addcc
010001
andcc
010010
orcc
010110
orncc
100110
srl
111000
jmpl
op3
(op=ll)
000000
Id
000100
st
cond
branch
0001
be
0101
bcs
0110
bneg
0111
bvs
1000
ba
(a).
Convert
the
following
bit
string
into
an
assembly
language
instruction
using
the
appropriate
ARC
syntax.
10011100100000111011111111111100
(b).
Convert
the
following
assembly
instruction
into
object
code,
jmpl
%r!5+4,
%rO
J.L
I
_?j?^y^v
-LLL
llf-
i
^
oo
e>
o
£>
oo
o
o
f
Q
o
pf3
pf4
pf5
pf8

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CMCS311 Section 0201 Exam 2

Name

19 April 2001 100 Points

(Please print legibly)

The point total for each problem precedes the problem number. To ensure full credit for your work, please place all answers in the spaces provided.

(8) 1. Use the formats below for this problem.

SETHH format Branch format CALL format

Arithmetic formats

Memory formats

00 rd op2 imm 00 0 cond op2 disp 01 disp

10 rd op3 rsl 0 00000000 rs 10 rd op3 rsl 1 simmlS

11 rd op3 rsl 0 00000000 rs 11 rd op3 rsl 1 simm!

op Format 00 SETHI/branch 01 CALL 10 Arithmetic 1 1 Memory

op2 Inst. 010 branch 100 sethi

Op3 (op=10j 010000 addcc 010001 andcc 010010 orcc 010110 orncc 100110 srl 111000 jmpl

op3 (op=ll) 000000 Id 000100 st

cond branch 0001 be 0101 bcs 0110 bneg 0111 bvs 1000 ba

(a). Convert the following bit string into an assembly language instruction using the appropriate ARC syntax.

10011100100000111011111111111100

(b). Convert the following assembly instruction into object code,

jmpl %r!5+4, %rO

J.L I _?j?^y^v -LLL llf-

i ^

oo e> o £> oo o o f Q o

(8) 2. Indicate on the spaces provided the requested values. Register values may be given in either binary or decimal.

.begin .org 2048 Id [x], %rl Id [y], %r srl%rl,2, %rl andcc%rl,%r2. %r st%rl,[x] st %r2, [y] jmpl%r!5 + 4, %rO 32

.end

a

(9) 3. Assume 8-bit operation codes, 16-bit operands and address, 16-bit words; and that data is moved to and from memory in 16-bit words. Moving an 8-bit operation code requires moving a complete word. Calculate the size of storage in bytes and the memory traffic in words for each of the following programs.

3 address

add C, D, A : mult B, A, A

size: I/

memory traffic:

2 address 1 load D. A add C, A 1 mult B, A

size: /£" (

memory traffic:

^ \ n ^

1 address

loadD

addC

multB

stor A

size: /£- __

memory traffic:

(10) 5. Indicate on the spaces provided the requested values.

.begin Id [w], %rl Id [x], %r andcc%rl,%r2, %r. be one st %r3, [w] one: Id [y], %r addcc%rl,%r4, %r bcs two st%r3,[x] two: Id [z], %r addcc %r4, %r5, %r bvs done st %r3, [y] done: jmpl %r!5 + 4, %rO w: x: y: z:

r r

.end

w

X =

z =

(7) 6. Connect the 3 address lines (AO, Al, A2), the read/write line (WR), as many of the

data in lines (DO, Dl, D2, D3, D4, D5, D6, D7) as necessary, as many of the data out

lines (QO, Ql, Q2, Q3, Q4, Q5, Q6, Q7) as necessary, and the l-to-2 decoder to the lines

on the two 4X4 RAM chips below to construct an 8-word, 4-bit RAM.

WR

AO

Al

A

Q7 Q6 Q5 Q4JQ3 Q2 Ql QO

\

(8) 9. A main memory has 232 words. The words are divided into 22i blocks of 2 7 words each. A set associative mapped cache is used with a set size of 4. The cache has 2 12 slots. Each slot also holds 2' words.

a- How many bits are in the ta Held of the cache? / • i _3 9~$lisS>/£er-_** /t

/V Tf)*> • —i

/ I? ' / ^ '

c. If the contents of memory address A035FOA4 are stored in cache

What would be the value, in hexadecimal, of the tag field? ^/

I A

hat would be the value, in hexadecimal, of the set field? (^) 3

_ L/

(8) 10. Assume the following about a mam memory: '

  • Direct mapped cache with 4 16-word slots
  • Block 0 of main memory contains words 0 to 15; block 1 contains words 16 to 31; block 2 contains words 32 to 47;...
  • The cache is initially empty

A program executes sequentially from word 0 to word 27. A loop, starting at word 28 and extending through word 49, then executes 8 times. The program then executes words 50,

  1. 52, and 53 and then terminates.

a. How many of the memory accesses would have been misses?

b. How many of the memory accesses would have been hits?

c. What will be the hit ratio? (You may leave this value as a fraction)

l I

•r V

(8) 11. A memory structure .has the following: Virtual memory of 2 12 words C^ % virtual pages 4 physical page frames 2g words in a page 2g words in a page frame

The page tables is as follows:

Page

0 1 2 ij 4 5 6 7

Present bit

1 0 1 1 0 1

Disk address

01001011100 11101110010 10110010111 00001001111 01011100101 10100111001 0 | 00110101100 0 I 01010001011

Page frame field 10 XX 00 11 XX 01 XX XX

Give-the physical address for each of the following hexadecimal virtual addresses if the contents of the virtual address are in main memory; if the contents of the virtual address are not in main memory, write, "NOT IN MAIN MEMORY."

Virtual Address

ABC

SAB

Physical Address (Either hexadecimal or binary)

,0lo