Hardware-based Speculation-Advance Computer Architecture-Lecture Slides, Slides of Advanced Computer Architecture

Download Hardware-based Speculation-Advance Computer Architecture-Lecture Slides and more Slides Advanced Computer Architecture in PDF only on Docsity!

Today's Topics

Recap

Hardware-based Speculations

• Speculating on the outcome of branches
• Extension in the Tomasulo’s hardware
• Handling Exceptions

Summary

Recap: Lecture 17

Last time we discussed three basic

concepts to accomplish multiple

instructions issue:

Branch Target Buffer Integrated Instruction Fetch Units Return Address Predictors

Recap Lecture 17… Cont’d

Integrated Instruction Fetch Unit (IIFU) integrates the following three functions into a single step :

Branch Prediction Instruction Prefetch Instruction memory access and buffering

Recap: Lecture 17… Cont’d

The Return-Address predictor

is one that predicts the indirect jumps,

i.e., the jumps for indirect procedure

calls and select or case statements

Recap: Lecture 17… Cont’d

Whereas, the VLIW-based processors schedule multiple instruction issues in one clock cycle using only the static scheduling approaches

Then we discussed the performance enhancement and factors limiting the performance in superscalar pipes –

statically scheduled and dynamically scheduled

Today’s Focus

Last time, in the loop-based example, we observed that

the control hazards, which prevent us from starting the next iteration before we know whether the branch was correctly predicted or not, causes one-cycle penalty, on every loop iteration

Today we will focus on the hardware-based speculation to address this limitation

Hardware-based Speculation

This approach has been implemented in the :

• PowerPC 620
• MIPS R
• Intel P6, and
• AMD K

Hardware Based Speculation: Basics

We have observed that

exploiting more instruction level

parallelism, increases the

burden of maintaining control

dependence

Hence, exploiting more parallelism

requires that we must overcome the

limitations of control dependence

These limitations are overcome by the

speculation on the outcome of

branches and executing the program

for speculations

Hardware Based Speculation: Basics

Here, we:

Fetch, Issue and Execute instructions

as if our branch predictions were always

correct.

We know that dynamic scheduling without

speculation fetches and issues but does

not execute such instructions until

prediction is checked and found correct

Hardware Based Speculation: Basics

Hardware Support: Speculative Execution

This can be achieved:

If hardware support for speculation

buffers the results and exceptions

from instructions,

until it is known that the instruction

would execute

This shows that:

Hardware based speculation combines three key ideas:

Dynamic Branch Prediction

Speculation

Dynamic scheduling

Hardware Based Speculation: Basics

3. Dynamic scheduling to deal with the scheduling of different combinations of basic blocks

Thus, the hardware based speculation follows the predicted flow of data values to choose when to execute

Hardware Based Speculation: Basics

To do so,

we must separate the

bypassing of results among

instructions, which (i.e., bypassing) is

needed to execute an instruction

speculatively,

from the actual completion of an

instruction

Hardware Based Speculation: Basics