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EECS 373 Midterm Exam ANSWERS
Winter 2006
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# Points
Section 1
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Section 2 /
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NOTES:
- Open White book and EABI only.
- There are 8 pages including this one.
- Calculators are allowed, but no PDAs, Portables, Cell phones, etc.
- Don’t spend too much time on any one problem.
- You have about 80 minutes for the exam.
- Be sure to show work and explain what you’ve done when asked to do so. Getting partial credit without showing work will be rare.
- In section 2 you will be asked to answer 2 out of 3 questions. Be sure to clearly cross-out the one you want to skip!
Section I
- Write an EABI-compliant PowerPC assembly code which does the same thing as the following C function. Note, you can assume that any functions called from this code have already been written. Variables which are always kept in registers need not have space allocated for them on the stack. You will be graded on the relevancy of your stack usage, ie. storing registers that need not be saved will be reduce your grade. Finally, comments may help when we assign partial credit! [20]
int bob(int a, int b) { int i,j; j=0; for(i=0;i<a;i++) j=tom(b+i)+j; return(j); } Solution to Assembly Problem
bob: mflr r stwu r1,-24(r1) #create stack frame stw r0,28(r1) #save LR stmw r28,8(r1) #save non-vols r28-r li r30,0 #i= li r31,0 #j= ori r28,r3,0 #a ori r29,r4,0 #b
again: cmp r3,r bge done #i<a? add r3,r29,r30 #b+i bl tom #tom(b+i) add r31,r3,r31 j=tom(b+i)+j addi r30,r30,1 #i++ b again done: ori r3,r31,0 #save j in return reg lwz r0, 28(r1) mtlr r0 #restore LR lmw r28,8(r1) #restore non-vols addi r1,r1,24 #release stack frame blr #return(j)
- Say the PowerPC 823 bus was clocked at 100 MHz. a. Without using bursts transactions, what is the fastest rate (in Megabytes/sec) at which the processor could read data? Show your work. [4]
.5 transactions/cycle * 100M cycles 4 bytes/transaction = 200MB/sec*
b. Including using bursts transactions, what is the fastest rate (in Megabytes/sec) at which the processor could read data? Show your work. [4]
.2 transactions/cycle * 100M cycles 16 bytes/transaction = 320MB/sec*
- Consider the following assembly program. Assume that R2=0x87654321 and R3=0x1000 and that all of memory is initialized to zero when this code starts.
stwu r2, 4(r3) sthu r2, -1(r3) lw r4, -1(r3) lha r5, 0(r3)
What values are found in registers r2-r5 after the above code is run? Provide all of your answers using 8-digit hex numbers. [10]
r2=____ 0x87654321 ___
r3=____ 0x00001003 ____
r4=____ 0x00432165 ____
r5=____ 0x00004321 ____
- Consider the PowerPC823 bus running at 10MHz. Say we are doing a store of the value 0x87654321 to memory location 0x00001003. Assuming everything happens as fast as possible , fill in the table below. Start from when #TS is first low, and finish when #TA is last low. If a signal is undefined write a dash in that space. Use hex for the address and data buses. If part of a signal on a bus is undefined write a dash for that part (so an ADS bus with --77--88 has the binary value of ---- ---- 0111 0111 ---- ---- 1000 1000). [15]
Initially, memory is as follows Address 0x1000 0x1001 0x1002 0x1003 0x1004 0x1005 0x1006 0x DATA 0x88 0x77 0x66 0x55 0x44 0x33 0x22 0x
(There maybe more cycles listed than you will need. Leave the extra blank.)
Cycle # #TS #TA RD/#WR TSIZE ADS DATA
1 0 1 0 01 0x00001003 0x--------
2 1 0 0 01 0x00001003 0x8787--
3 0 1 0 10 0x00001004 0x--------
4 1 0 0 10 0x00001004 0x6543----
5 0 1 0 01 0x00001006 0x--------
6 1 0 0 01 0x00001006 0x21--21--
Section II
You are to answer ONLY 2 of the following 3 questions****. Cross out the one you don’t want graded, otherwise we will grade the first two.
- Consider a memory device which is to respond to all addresses in the range of 0x03200000 to 0x03200FFF. You are to design a module in Verilog which takes ADS[6:31] as input and generates an output of one if the address is in the range for this device. Any comparisons you wish to do must be checks for equality. That is, you may only use = = to compare two values. You need not worry unused wires being eliminated from the device (as some of you had happen in lab!) [10]
module memory(ADS,out); input [6:31] ADS; output out;
assign out=(ADS[6:19]==14’h3200);
endmodule
- Consider the PCI bus protocol. For this problem, assume that the bus is clocked at 10MHz a. If each transaction is 8 bytes, what is the best read bandwidth achievable? Show your work. [5]
ADS, turnaround, DATA, DATA, turnaround Thus we have 5 cycles per transaction or 2 million transactions per second. So we can move 16 million bytes per second.
b. If each transaction is 16 bytes, what is the best write bandwidth achievable? Show your work. [5]
ADS, data, data, data, data Thus again 5 cycles per transaction or 2 million tranaactions per second. So we can move 32 million bytes per second.
(The 3rd^ question of this section is on the next page)
(Recall you only need to do 2 of the 3 questions in this section and you should cross out the one you don’t want graded!)
- Answer the following memory-related questions a. What does the D in DRAM stand for and what does that word mean in this context? [4]
Dynamic. It means that the data goes away over time, even with power applied
b. If you have a 1024 by 1024 array of memory and the output from that memory is 2 bits, how many address lines do you need to select the right two bits? Show your work. [6]
You are selecting from 10241024/2 groups of 2 bits. Log base 2 of that number is 19. So you need 19 bits.*
Or you could look at is as 10 bits for the row and 9 bits to select a group of 2 columns…
