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ECE 2030
Section E
Midterm II
October 27
th
- The Georgia Tech Honor Code governs this examination.
- There are 10 questions and 11 pages including two blank worksheets. Make sure you have all of them.
- Please write/draw legibly. Use the work sheets for generating the solutions before providing the final answer.
- State any assumptions you feel you have to make or ask for clarification
- Keep in mind it is difficult to give partial credit without written material. Please make sure you document any partial solutions.
- All problems carry equal weight.
7. Plan your work!
Problem Graded
Total
Student Name: __________________________________
Student Number: ________________________________
- Implement the following truth table using the components identified below
A B C F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 0
a) A 3-8 decoder & gates. Clearly label the inputs and outputs of the decoder.
b) A 4-1 multiplexor & gates. Clearly label the inputs and outputs of the multiplexor.
3. Implement the following expression in the PLA shown by identifying the connections
which should be made with an X and setting the value of the ex-or gate input.
F = ABC + AC + B
A B C
- What size decoder will be used in a 16 word by 24 bit ROM (number of inputs and
number of outputs)?
- Fill in the following table
Hexadecimal Octal Binary Base 10 A.B
Provide the hexadecimal value of the double precision floating point representation of
(10 pts) Consider the following 4 bit 2’s complement adder/subtractor. (FA = Full adder, 2:1 = 2:1 Mux)
a. What is the value of the output when A = 0100, B= 0010 and C_in = 1?
b. How can you add logic (gates) to the above design, and operate the design so that it will generate a signal with a value of 1 if A ≥ B?
- Fill in the waveform below. Ignore propagation delays.
Reg
Reg
Reg
A
B C
D
