Building a Subsystem with 8088, 8284, MC14411, and Supporting Hardware, Study Guides, Projects, Research of Electrical and Electronics Engineering

A microprocessor sub project where students will wire wrap chips including the 8088 microprocessor, 8284 clock generator, mc14411 baud rate generator, and supporting data and address bus hardware (74hc373, 74hc244, 74hc245). The objectives include drawing the schematic, following wire color codes and bus connection rules, using by-pass capacitors, and avoiding common mistakes such as misconnecting the 8088 and 74hc245. The demonstration outlines signals to check for proper functioning.

Typology: Study Guides, Projects, Research

Pre 2010

Uploaded on 02/24/2010

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ECE424 Microprocessor Sub Project 1
1 Objectives
In this project, the following chips will be wire wrapped to implement the sub system shown in
the figure below.
1. 8088 microprocessor
2. 8284 clock generator
3. MC14411 baud rate generator
4. Supporting Data and address bus hardware (74HC373, 74HC244, 74HC245)
8088
8088
74HC373
74HC244
74HC245
MC14411
8284
Address Bus Data Bus
1.8432MHz
12Mhz
10 uF SPST
AD[7:0]
AD[7:0]
A[15:8] READY
CLK
RESET
Vcc
2 Instructions
1. Draw the schematic that clearly indicates the connection for each pin of the chips used in the
subsystem.
2. Follow the wire color code, bus connection rules, and board layout.
3. Use by-pass capacitors for all the ICs
3 Frequent Mistake
Connections between 8088 and 74HC245 are frequenctly misconnected. Carefully consider the
data flowing directions on 8088 data bus and decide whether A or B side should be connected to
8088 pins.
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pf2

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ECE424 Microprocessor Sub Project 1

1 Objectives

In this project, the following chips will be wire wrapped to implement the sub system shown in the figure below.

  1. 8088 microprocessor
  2. 8284 clock generator
  3. MC14411 baud rate generator
  4. Supporting Data and address bus hardware (74HC373, 74HC244, 74HC245)

8088 8088

74HC

74HC

74HC

MC

1.8432MHz^ Address Bus^ Data Bus

12Mhz

10 uF SPST

AD[7:0]

AD[7:0] A[15:8] (^) READY CLK RESET Vcc

2 Instructions

  1. Draw the schematic that clearly indicates the connection for each pin of the chips used in the subsystem.
  2. Follow the wire color code, bus connection rules, and board layout.
  3. Use by-pass capacitors for all the ICs

3 Frequent Mistake

Connections between 8088 and 74HC245 are frequenctly misconnected. Carefully consider the data flowing directions on 8088 data bus and decide whether A or B side should be connected to 8088 pins.

4 Demonstration

To pass the test of the subsystem 1, check the following signals:

  1. Ready signal (8088 pin 22) should be always high
  2. Reset signal (8088 pin 21) should be normally low. When the reset button is pressed, the signal will go to high voltage for a second or so and then return to low voltage level.
  3. ALE and clock (8088 pins 25 and 19) should look something close to the following figure: T1 T2 T3 T

One bus cycle

CLK ALE

  1. RD or W R signal: you also should observe RD or W R signal goes to low during states T and T3 of a bus cycle.
  2. Baud rate signals: you should get the following frequency at the 14411 output pins: Pin # Frequency (KHz) 1 153. 2 76. 3 38. 4 19. 5 9. 7 4.