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8088 Assembly Test 2: Understanding Instructions, I/O, and Memory, Exams of Microprocessors

The University of Mississippi (Ole Miss)Microprocessors

A take-home test for an 8088 assembly language course. The test covers various topics including the operation of instructions, i/o access, and memory organization. Students are required to explain the operation of certain instructions, identify the number of address and data lines used in the 8088 system, and write procedures for measuring time and controlling i/o devices. References are limited to handouts on 8088 assembly language, 8255, and library procedures.

Typology: Exams

Pre 2010

Uploaded on 09/02/2009

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El E 485 Test 2 Fall 1998
Closed Book
No references allowed.
1) (20 points) Explain the operation of the following instructions, being sure to
note the registers that are involved. A register-transfer-language description
is sufficient. Your answer must be 8088-oriented and state what happens at
the register-level. For example, “RET = returns” will receive 0 points.
a) RET
b) DIV BX
c) M1: LOOP L1
M5: next instruction
d) Explain the difference between the following instructions
OUT dx, al and Mov dx,al. If there is no difference, then explain the
operation.
2) (10 points)
a) How many address lines are used to access the 8088’s I/O space? ______
b) How many address lines are used to access the 8088’s memory space? ____
c) How many data lines are there on in an 8088-based system? ______
d) The total number of pins on the 8088 chip used for a), b) and c) above is _______
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El E 485 Test 2 Fall 1998 Closed Book No references allowed****.

  1. (20 points) Explain the operation of the following instructions, being sure to note the registers that are involved. A register-transfer-language description is sufficient. Your answer must be 8088-oriented and state what happens at the register-level. For example, “RET = returns” will receive 0 points. a) RET b) DIV BX c) M1: LOOP L M5: next instruction d) Explain the difference between the following instructions OUT dx, al and Mov dx,al. If there is no difference, then explain the operation.
  2. (10 points) a) How many address lines are used to access the 8088’s I/O space? ______ b) How many address lines are used to access the 8088’s memory space? ____ c) How many data lines are there on in an 8088-based system? ______ d) The total number of pins on the 8088 chip used for a), b) and c) above is _______

. References Section: Allowed references: Handouts on 8088 assembly language, 8255, and library procedures (if no additional information has been added); and a86/d86 user's manual. Not allowed: textbook, notes, homework.

  1. (10 points) Assume that A15 - A0 represent the 16 address lines that define the port address space. For the "black box" shown below, show the connections between the address lines and the black box that will result in the black box occupying addresses A0C8 - A0CF. You may use any logic gates. A A A A A A A A A A A A A

A

A

A

D

D

D

D

D

D

D

D

CS

A

A

A

IO/M

  1. (15 points) You have been asked to assist the Psychology Department in conducting an experiment where the effectiveness of pain-killing drugs is tested by placing rats on a hot plate and measuring how long they remain. Write an 8088 procedure that will measure how long the rat is on the plate. The experiment proceeds as follows: 1) The main program “calls” your procedure, 2) The rat is placed on the plate, 3) When the rat steps off the plate, your procedure should end with the number of seconds the rat was on the plate stored in the AX register. You have available for your use another procedure called mil200 that delays for 200 milliseconds before returning. You can access the 8255 using the labels PortA, PortB, PortC, and Stat.

El E 485 Test 2 Fall 1998 Take-home test Engineering School Honor Code Test. You can’t receive assistance from any human except Dr. Tew, Dr. Smith, or Mr. Rodriguez. If you seek assistance from Dr. Smith or Mr. Rodriguez, you must show them the take home test first, and ask the question second. You can’t give assistance to any other student. The take-home test is due at 8 AM on Thursday, October 29, 1998.

  1. (20 points) Assume that you have the A/D and D/A chips available in the 486 laboratory, accessed by the usual labels (DAC0, …, DAC7, WRTCH1, STBAD1, RDCHN1). Further assume the following differences from the laboratory: The A/D chip has been calibrated to 10 mV/bit and the D/A chip has been calibrated at 15 mV/ bit. a) What is the voltage range of input signals that can be read correctly by the A/ D? b) What is the voltage range of output signals that can be created by the D/A? c) You have been asked to write a procedure that will act as a threshold detector. That is, your device should “watch” an analog signal. The output should be a given voltage level when the analog signal is below the threshold and at another voltage level when the analog signal is above the threshold. End your procedure whenever: a) there is an error in the input variables, or b) the analog input voltage is zero You can assume that the following memory variables have been defined: Thresh a word-wide variable whose value is the threshold in millivolts Low_out a byte-wide variable whose value is the desired output voltage in tenths of volts (0.1 volts) when the analog signal is below the threshold High_out a byte-wide variable whose value is the desired output voltage in tenths of volts (0.1 volts) when the analog signal is above the threshold. Error a byte-wide variable that should be set to 0 if the detector is worked correctly and should be set to 1 if any of the three variables defined above exceed the range of the system.
  1. (25 points) Shown on the next page is an 8255 and a simplified block diagram of a 4416 (16K x 4 dynamic RAM). Draw the connections between the 8255 and the 4416, and write two procedures: a) Procedure Wr_DR configures the 8255 and writes the low four bits of AL to the dynamic RAM address stored in DX 15 - DX 2. b) Procedure Rd_DR configures the 8255, reads the four bits from the dynamic RAM address stored in DX 15 - DX 2 and stores them in the low four bits of AL. Note: While the two procedures may configure the 8255 differently, the physical connections must be the same for both procedures. A simplified description of the operation of the 4416 follows*: The 14 bits needed to specify 16K addresses are latched into the 4416 by putting the most significant 8 bits on pins A7 - A0 and causing a low pulse on RAS (^) , then the least significant 6 bits are placed on A6-A1 followed by a low pulse on CAS. All addresses must be stable on or before the falling edge of RAS and CAS. The read or write mode is selected through W. A logic high on W selects the read mode and a logic low on W selects the write mode. For an early write cycle, W^ is brought low prior to CAS^ and data is strobed in by the falling edge of CAS. For a read cycle the output becomes active after CAS goes low and stays active as long as CAS and G are low. CAS or G going high returns the output to the high impedance state. Whenever G^ is high, the output is in the high impedance state. Bringing G low during a normal cycle will active the output buffers putting them in the low impedance state. Once in the low impedance state, they will remain in the low impedance state until G or CAS is brought high. *(taken from the Texas Instruments MOS Memory Data Book, 1984 ).