Output Multiplexer - Computer Organization - Homework, Exercises of Computer Architecture and Organization

These HOMEWOR NOTES are very easy to understand and very helpful to built a concept about the foundation of computers ORGANIZATION and Database Design.The key points in these slide are:Operating System Hardware, Role of Operating System, Infinite Loop, Goals of Operating System, Operating System Software, Functions of Operating System, Dual-Modes of Operation, Processor-Status-Word

Typology: Exercises

2012/2013

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Homework #3 Computer Organization
1. Draw the circuit (using AND, OR, and NOT gates) to implement an 8-input to 1-output multiplexer (MUX).
Your MUX should have 3 control wires (c
2
, c
1
, c
0
) to select which input is switched to the single output.
2. Recall that the sum-of-products (SOP) Boolean formula for the carry-out (c
i+1
) of a n-bit adder was :
1-bit adder: c
i+1
= x
i
y
i
+ x
i
c
i
+ y
i
c
i
.
2-bit adder: c
i+1
= x
i
y
i
+ x
i
(x
i-1
y
i-1
+ x
i-1
c
i-1
+ y
i-1
c
i-1
) + y
i
(x
i-1
y
i-1
+ x
i-1
c
i-1
+ y
i-1
c
i-1
)
= x
i
y
i
+ x
i
x
i-1
y
i-1
+ x
i
x
i-1
c
i-1
+ x
i
y
i-1
c
i-1
+ y
i
x
i-1
y
i-1
+ y
i
x
i-1
c
i-1
+ y
i
y
i-1
c
i-1
3-bit adder: c
i+1
= x
i
y
i
+ x
i
( 7 product terms of 2-bit adder ) + y
i
( 7 product terms of 2-bit adder )
= x
i
y
i
+ x
i
x
i-1
y
i-1
+ ... ( 12 product terms omitted ) + y
i
y
i-1
y
i-2
c
i-2
4-bit adder: c
i+1
= x
i
y
i
+ x
i
( 15 product terms of 3-bit adder ) + y
i
( 15 product terms of 3-bit adder )
= x
i
y
i
+ x
i
x
i-1
y
i-1
+ ... ( 28 product terms omitted ) + y
i
y
i-1
y
i-2
y
i-3
c
i-2
a) Complete the following table showing the gate delays for different types of adders assuming a 9-input limit
into any gate.
101,0239-bit
95118-bit
82557-bit
71276-bit
6635-bit
8 x 3 = 243215314-bit
10 x 3 + 2 = 323214153-bit
16 x 2 = 32211372-bit
32 x 2 = 64211231-bit
Gate Delays for
32-bit ripple adder
using adders of this
type
Gate
Delay per
Adder
# gate delays
due to
sum/OR
# gate delays due
to product/AND
terms
Most # of inputs
in any of the
product terms
# of product terms
in SOP expression
to be OR’ed
Type
of
Adder
b) Consider the SOP Boolean formula for the carry-out (c
i+1
) of a 9-bit adder:
x x xx xxy y yy y
c
c
y
i i-1 i-6i-5 i-8i-7i i-1
i+1
i-6i-5 i-8
i-8
i-7
. . .
Give an example of each of the following:
i) a product term with only two terms
ii) a product term with 10 terms
Name:____________________
HW #3 Page 1
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Homework #3 Computer Organization

  1. Draw the circuit (using AND, OR, and NOT gates) to implement an 8-input to 1-output multiplexer (MUX). Your MUX should have 3 control wires (c 2 , c 1 , c 0 ) to select which input is switched to the single output.
  2. Recall that the sum-of-products (SOP) Boolean formula for the carry-out (ci+1) of a n-bit adder was : 1-bit adder: ci+1 = xi yi + xi ci + yi ci.

2-bit adder: ci+1 = xi yi + xi (xi-1 yi-1 + xi-1 ci-1 + yi-1 ci-1) + yi (xi-1 yi-1 + xi-1 ci-1 + yi-1 ci-1) = xi yi + xi xi-1 yi-1 + xi xi-1 ci-1 + xi yi-1 ci-1 + yi xi-1 yi-1 + yi xi-1 ci-1 + yi yi-1 ci-

3-bit adder: ci+1 = xi yi + xi ( 7 product terms of 2-bit adder ) + yi ( 7 product terms of 2-bit adder ) = xi yi + xi xi-1 yi-1 + ... ( 12 product terms omitted ) + yi yi-1 yi-2 ci-

4-bit adder: ci+1 = xi yi + xi ( 15 product terms of 3-bit adder ) + yi ( 15 product terms of 3-bit adder ) = xi yi + xi xi-1 yi-1 + ... ( 28 product terms omitted ) + yi yi-1 yi-2 yi-3 ci-

a) Complete the following table showing the gate delays for different types of adders assuming a 9-input limit into any gate.

9-bit 1,023 10

8-bit 511 9

7-bit 255 8

6-bit 127 7

5-bit 63 6

4-bit 31 5 1 2 3 8 x 3 = 24

3-bit 15 4 1 2 3 10 x 3 + 2 = 32

2-bit 7 3 1 1 2 16 x 2 = 32

1-bit 3 2 1 1 2 32 x 2 = 64

Gate Delays for 32-bit ripple adder using adders of this type

Gate Delay per Adder

gate delays

due to sum/OR

gate delays due

to product/AND terms

Most # of inputs in any of the product terms

of product terms

in SOP expression to be OR’ed

Type of Adder

b) Consider the SOP Boolean formula for the carry-out (ci+1) of a 9-bit adder:

x y x y x y x y x x y

c c

i i i-1 i-1 i-5 i-6 i-7y i-

i+

i-5 i-6 i-

i-

i-

Give an example of each of the following: i) a product term with only two terms

ii) a product term with 10 terms

Name:____________________

HW #3 Page 1

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  1. Suppose we have a register file with the following specifications (see Register File handout at: ):  16 registers numbered from 0 to 15  each register has 32-bits  one write port  two read ports

a) What how many bits(/”wires”) would be need for each of the following?  data to be written for a write port  specifying the register number of a read port  specifying the register number of a write port  output read from a read port

b) How many write enable wires would be needed for the whole register file?

c) How many decoders would be needed in the implementation of the whole register file? Explain how you arrived at that number and specify the type of decoders (i.e., number of inputs and number of outputs for each decoder)

  1. Complete the below diagram of a 4-bit register so that it is able to perform the following operations:  parallel read/output of all bits (just look at the Q values) Control the MUXs using the following codes: 002 - parallel write/load/input of all bits 012 - circular shift left two bit position (values shifted out of most-significant bit is shifted into the least-significant bit) 102 - arithmetic shift right (sign-extend the most-significant bit) 112 - logical shift right one bit position (value shifted out of least-significant bit is lost and a “0” is shifted into the most-significant bit) Note: For each D-flip flop, the output of a MUX is used as the D-input.

D D D D

Q Q Q Q

0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3

Load

Control

Data to Write in Parallel

Data to Read in Parallel

MUX MUX MUX MUX

Name:____________________

HW #3 Page 2

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