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These HOMEWOR NOTES are very easy to understand and very helpful to built a concept about the foundation of computers ORGANIZATION and Database Design.The key points in these slide are:Operating System Hardware, Role of Operating System, Infinite Loop, Goals of Operating System, Operating System Software, Functions of Operating System, Dual-Modes of Operation, Processor-Status-Word
Typology: Exercises
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2-bit adder: ci+1 = xi yi + xi (xi-1 yi-1 + xi-1 ci-1 + yi-1 ci-1) + yi (xi-1 yi-1 + xi-1 ci-1 + yi-1 ci-1) = xi yi + xi xi-1 yi-1 + xi xi-1 ci-1 + xi yi-1 ci-1 + yi xi-1 yi-1 + yi xi-1 ci-1 + yi yi-1 ci-
3-bit adder: ci+1 = xi yi + xi ( 7 product terms of 2-bit adder ) + yi ( 7 product terms of 2-bit adder ) = xi yi + xi xi-1 yi-1 + ... ( 12 product terms omitted ) + yi yi-1 yi-2 ci-
4-bit adder: ci+1 = xi yi + xi ( 15 product terms of 3-bit adder ) + yi ( 15 product terms of 3-bit adder ) = xi yi + xi xi-1 yi-1 + ... ( 28 product terms omitted ) + yi yi-1 yi-2 yi-3 ci-
a) Complete the following table showing the gate delays for different types of adders assuming a 9-input limit into any gate.
9-bit 1,023 10
8-bit 511 9
7-bit 255 8
6-bit 127 7
5-bit 63 6
4-bit 31 5 1 2 3 8 x 3 = 24
3-bit 15 4 1 2 3 10 x 3 + 2 = 32
2-bit 7 3 1 1 2 16 x 2 = 32
1-bit 3 2 1 1 2 32 x 2 = 64
Gate Delays for 32-bit ripple adder using adders of this type
Gate Delay per Adder
due to sum/OR
to product/AND terms
Most # of inputs in any of the product terms
in SOP expression to be OR’ed
Type of Adder
b) Consider the SOP Boolean formula for the carry-out (ci+1) of a 9-bit adder:
x y x y x y x y x x y
c c
i i i-1 i-1 i-5 i-6 i-7y i-
i+
i-5 i-6 i-
i-
i-
Give an example of each of the following: i) a product term with only two terms
ii) a product term with 10 terms
Name:____________________
HW #3 Page 1
a) What how many bits(/”wires”) would be need for each of the following? data to be written for a write port specifying the register number of a read port specifying the register number of a write port output read from a read port
b) How many write enable wires would be needed for the whole register file?
c) How many decoders would be needed in the implementation of the whole register file? Explain how you arrived at that number and specify the type of decoders (i.e., number of inputs and number of outputs for each decoder)
0 1 2 3 0 1 2 3 0 1 2 3 0 1 2 3
Load
Control
Data to Write in Parallel
Data to Read in Parallel
MUX MUX MUX MUX
Name:____________________
HW #3 Page 2