Priority Encoder & Multiplexer: Operation, Implementation & Boolean Function, Slides of Digital Logic Design and Programming

The concepts of priority encoders and multiplexers, their operation, and how to implement Boolean functions using multiplexers. It includes examples and references to textbooks.

Typology: Slides

2019/2020

Uploaded on 10/11/2020

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Priority Encoder

Multiplexer

Priority Encoder

  • (^) The operation of the priority encoder is

such that if two or more inputs are equal to

1 at the same time, the input having the

highest priority will take precedence.

4-input Priority Encoder

Priority Encoder

Multiplexer

V.Saritha@VIT University

4 – to – 1 line multiplexer

Multiplexers

  • (^) In general, a 2n^ – to – 1 line multiplexer is

constructed from an n – to – 2n^ decoder by

adding to it 2

n

input lines, one to each

AND gate.

  • (^) The outputs of the AND gates are applied

to a single OR gate to provide the 1-line

output.

V.Saritha@VIT University Quadruple 2 – to – 1 line Multiplexers

Boolean Function Implementation

  • (^) The min terms out of the decoder to be chosen can be controlled with the input lines.
  • (^) The minterms to be included with the function are chosen by making their corresponding input lines equal to 1
  • (^) Those minterms not included in the function are disabled by making their input lines equal to 0.
  • (^) This method implements the Boolean function of n variables with a 2n^ – to – 1 multiplexer.

2 nd Method for Boolean Function Implementation using Multiplexers

  • (^) Boolean Function has n + 1 variables
  • (^) Connect n variables to selection lines
  • (^) The remaining single variable is used for the inputs of the multiplexer
  • (^) If ‘A’ is this single variable, the inputs of the multiplexer are chosen to be either A or A′ or 1 or 0.
  • (^) In this method, Boolean function of n + 1 variables is implemented using 2n^ to 1 line MUX.

Procedure for implementing any Boolean

function of n+1 variables using 2

n

x 1 MUX

  • (^) Express the function in its sum of minterms form.
  • (^) Assume that the ordered sequence of variables is ABCD…
  • (^) Connect right most n-1 variables as selection lines with B connected to the high-order selection line.
  • (^) The first half of minterms have ‘A’ in complemented form and the second half have ‘A’ in its true form.
  • (^) List all the minterms in two rows
  • (^) First row
    • (^) List all those minterms where A is complemented
  • (^) Second row
    • (^) List all those minterms where A is uncomplemented.

Example F = Σ(1, 3, 5, 6)

Examples

  • (^) Implement using Multiplexers
    • (^) F (A,B,C,D)= Σ(0,1,3,4,8,9,15)
    • (^) F(A,B,C) = Σ(1,3,5,6) with C as input variable
    • (^) Construct 8 x 1 MUX with dual 4 line to 1 line mux having separate enable inputs but common selection lines. use a block diagram construction.