Process Sequence Description - Microfabrication Technology - Exam, Exams of Materials science

Main points of this exam paper are: Process Sequence Description, Implement, Cross-Section, Resistor Body, Cross-Sections, Process Description, Starting Wafer

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Fall 2000
UNIVERSITY OF CALIFORNIA
College of Engineering
Department of Electrical Engineering and Computer Sciences
EE143 Midterm Exam #1
Family Name _______________________ First name___________________________
Signature______________________________________________________________
Make sure the exam paper has 8 pages plus an appendix page at the
end.
Instructions: DO ALL WORK ON EXAM PAGES
This is a 90-minute exam (3 sheets of notes allowed)
Grading: To obtain full credit, show correct units and algebraic sign in answers.
Numerical answers which are orders of magnitude off will receive no partial credit.
Problem 1 (20 points)________________
Problem 2 (25 points)_______________
Problem 3 (30 points) ________________
Problem 4 (25 points) ________________
TOTAL (100 points) __________________
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Fall 2000 UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences

EE143 Midterm Exam #

Family Name _______________________ First name___________________________

Signature______________________________________________________________

Make sure the exam paper has 8 pages plus an appendix page at the

end.

Instructions: DO ALL WORK ON EXAM PAGES This is a 90-minute exam (3 sheets of notes allowed)

Grading: To obtain full credit, show correct units and algebraic sign in answers. Numerical answers which are orders of magnitude off will receive no partial credit.

Problem 1 (20 points)________________

Problem 2 (25 points)_______________

Problem 3 (30 points) ________________

Problem 4 (25 points) ________________

TOTAL (100 points) __________________

Problem 1 Process Sequence Description (20 points total)

We would like to implement a simple RC low-pass filter in integrated form. The top view, the equivalent circuit, and the cross-section along line AB are shown below. The resistor body is lightly doped (n-) poly- Si and the top capacitor plate of is heavily doped (n+) poly-Si. Cross-sections along AB after major processing steps are sketched in the right column of the table shown below. Fill in the sequence of process steps used in the left column.

Process Description Cross Section along AB

  1. Starting wafer, p- Si

p -substrate (lightly doped)

p -substrate (lightly doped)

pad oxide photoresist Si3N

Boron Channel Stop Implant

p p p -substrate (lightly doped)

SiO2 SiO

n- poly Si (lightly doped)

p p

p -substrate (lightly doped)

SiO2 n+ SiO

C V D S i O 2

Al n+ poly Si (heavily doped) Gate oxide

A B

Al Al

n+ Si (bottom plate of capacitor)

n+ poly Si (top plate of capacitor)

n- poly Si

contact hole Al

Problem 2 Thermal oxidation ( 25 points total) (a) (10 points) For a particular oxidation process, it is known that the oxidation rate (dxox/dt) is 0.48μm

/hour when the oxide thickness is 0.5 μm and it slows down to 0.266 μm /hour when the oxide thickness is 1 μm. Find the linear oxidation constant (B/A) and the parabolic oxidation constant B. Give answers in proper units.

(b) (15 points) A lightly doped Si wafer has been processed by some unknown IC processing steps.

You then perform a thermal oxidation experiment [fixed temperature and fixed oxidizing ambient] with this wafer and observed the following oxide growth results:

Oxidation Time SiO2 Thickness 0 hour 0 1 hour 2000 Å 4 hours 2500 Å

Are the following conjectures TRUE or FALSE? You have to give brief explanations to justify your answers.

Conjecture 1 : The processed Si wafer was oxidized first to an oxide thicknes of 100 Å and then have the oxide dissolved in HF.

Conjecture 2 : The processed Si wafer has a highly doped surface layer ( doping > 10^19 /cm^3 ) which is less than 1000 Å thick.

Conjecture 3: The processed Si wafer has a thin layer of poly-Si layer on top surface.

Problem 3 Ion Implantation (30 points total)

(a) Phosphorus ions are implanted through 50nm of SiO 2 into an underlying silicon substrate. Design an implantation step which will give the following phosphorus profile which has a peak concentration of 1017 /cm^3 and a concentration of 10^15 /cm^3 at the Si/SiO 2 interface. Assume the stopping power of SiO 2 is the same as silicon.

(i) Express the distance ∆ in terms of the straggle ∆Rp of the implant profile.

(ii) Choose the required approximate energy for the Phosphorus ions.

(iii) Calculate the dose required.

SiO 2 Si

1017 /cm^3

1015 /cm^3

Rp

depth x

x= 0 x =50nm

C(x) [ log scale]

∆∆

10 100 1000 10

100

1000

10000

∆∆ Rp=24.39576+4.93641 E -0.00697 E^2 +5.858e-6 E^3 -2.024e-9 E^4

Rp =-7.14745 +12.33417 E +0.00323 E^2 -8.086e-6 E^3 +3.766e-9 E^4

∆∆ Rp

Rp

P

into Si

Projected Range & Straggle in Angstrom

Ion Energy E in keV

Problem 4 Diffusion (25 points total)

(a) (10 points) A boron predeposition step is performed into an n-type Si substrate with a background concentration CBof

1 × 1015 /cm^3. The predeposition thermal cycle is 975 oC for 60 minutes. Given: Boron solid solubility at 975 oC = 3.5 × 1020 /cm^3 Boron diffusion constant at 975 oC = 1.5 × 10 -14^ cm^2 /sec

(i) Calculate the junction depth xj.

(ii) Calculate the incorporated boron dose Q.

(b) (10 points) You are faced with the following three choices for forming the source and drain of a NMOS transistor.

(Process i) Shallow diffusion predeposition dose of Q phosphorus atoms /unit area , followed by a drive-in at 1100°C for 60 minutes. (Process ii) Shallow diffusion predeposition dose of Q phosphorus atoms /unit area , followed by a drive-in at 1150°C for 30 minutes. (Process iii) Shallow implantation dose of Q phosphorus atoms / unit area , followed by an anneal at 950°C for 10 minutes Use the following diffusivity values: TEMPERATURE D(Phosphorus) 950°C (^5) × 10 -5^ μm^2 / min 1100°C (^2) × 10 -3^ μm^2 / min 1150°C (^5) × 10 -3^ μm^2 / min

xj

poly-Si gate

p-Si ( Na=1E15/cm3 )

n+ n+

L

Problem 4 continued

(i) Which process will give the shortest MOSFET channel length L? Justify your answer.

(iii) If the substrate doping is increased from 1 × 1015 to 1 × 1016 boron atoms /cm^3 , which of the three processes will exhibit the greatest change in channel length? Explain your reasoning.

(c) (5 points) For high-concentration Arsenic drive-in diffusion, the diffusion depth profile is approximately rectangular with a peak concentration equals to the solid solubility CS. Qualitatively plot the

Irvin Curve [i.e., log CS versus log (RS xj)] for low background concentrations NB. What is the vlaue of

the slope for this plot? Show your derivations.

Log C(x)

NB

xj Depth x

CS

EE143 Midterm #1 Solutions Fall 2000 Problem 1 Process Description Cross Section along AB

  1. Starting wafer, p- Si

p -substrate (lightly doped)

  1. Pad oxide growth Si 3 N 4 deposition

Active area patterning (Mask #1) Channel stop Boron implantation Remove photoresist p -substrate (lightly doped)

pad oxide photoresist Si3N

Boron Channel Stop Implant

  1. Local oxidation to grow field oxide Strip Si 3 N 4

Strip pad oxide (chemical dip)

p (^) p

p -substrate (lightly doped)

SiO2 SiO

  1. As implantation to form n+^ in active region Gate oxide oxidation (^) p (^) p

p -substrate (lightly doped)

SiO2 SiO2n+ SiO

  1. Undoped poly-Si deposition Blanket As implant (low dose) to form n-^ poly-Si n- poly Si (lightly doped)

p p p -substrate (lightly doped)

SiO2 SiO2n+ SiO

As implant (low dose)

  1. Masking resistor region with photoresist (Mask #2) As implantation (high dose) to form n+poly-Si

n- poly Si (lightly doped)

p p p -substrate (lightly doped)

SiO2 n+ SiO

n+ poly Si (heavily doped)

SiO

photoresist

As implant (high dose)

  1. Pattern poly-Si (Mask #3) Deposit CVD SiO 2

Diffuse and activate dopants in poly-Si with short time annealing (≈ 900°C)

n- poly Si (lightly doped)

p p

p -substrate (lightly doped)

SiO2 n+ SiO

CVD SiO

n+ poly Si (heavily doped)

SiO

  1. Metal contact opening (Mask #4) n- poly Si (lightly doped)

p p

p -substrate (lightly doped)

SiO2 n+ SiO

CVD SiO

n+ poly Si (heavily doped)

SiO

  1. Al deposition Al interconnect patterning (Mask #5)

n- poly Si (lightly doped)

p p p -substrate (lightly doped)

SiO2 n+ SiO

CVD SiO

n+ poly Si (heavily doped)

SiO

Al

Problem 2 (a) From the Grove model, we have : xox^2 + Axox = B(t+τ)

Therefore,

2xox

dxox dt + A

dxox dt = B

or

dxox dt

B

A+2xox

From 0.48 =

B
A+0.5× 2

and 0.266 =

B
A+1× 2

, we get

A=0.243 μm , B= 0.597 μm^2 /hour and B/A = 2.46 μm/hour

(b) The observed indicates the growth rate is slower than the Deal-Grove model after 2000 Å of oxide is grown. Even if we take the limit that growth rate is proportional (time)1/2^ , the oxide will be thicker than 4000 Å after 4 hours of oxidation. The Si surface layer must have a faster oxide rate than the bulk of the wafer.

Conjecture 1 : The processed Si wafer was oxidized first to an oxide thickness of 100 Å and then have the oxide dissolved in HF. FALSE Dopant segregation can enhance oxidation rate but the small oxide growth cannot change the surface layer dopant concentration due to dopant segregation.

Conjecture 2 : The processed Si wafer has a highly doped surface layer ( doping > 10^19 /cm^3 ) which is less than 1000 Å thick. TRUE

The Si wafer has a highly doped surface layer ( N > 10^19 /cm^3 ) which is less than 1000 Å thick ( i.e., 0.46 × 2000 Å ≈1000 Å). The underneath substrate is lightly doped. The Si wafer has a highly doped region underneath a lightly doped surface region. Oxidation rate is higher when the doping concentration is higher than 10^19 /cm^3 , mainly through the linear term B/A. After this layer of highly doped Si is consumed, the growth rate slows down.

Conjecture 3 : The processed Si wafer has a thin layer of poly-Si layer on top surface. TRUE Initial oxidation of poly-Si is very fast. After poly-Si is all consumed, the oxidation rates slows down.

Problem 3 (a)

(i) Np exp[

- (∆)^2

2(∆Rp)^2

] = NB

Let z =

2 ∆Rp
, exp[-z^2 ] = 10-2^ implies z = 2.15 from gaussian chart.
Therefore , ∆ = 2.15 × 2 ×∆Rp= 3.04 ∆Rp

(ii) The required phosphorus energy has to satisfy Rp= 500 Å+ 3.04 ∆Rp

From the Rpand ∆Rpcurves, an energy of ~300keV will satisfy this condition with

Rp = 3600 Å and ∆Rp= 1000 Å

N B

distance

NB

conc. (log scale)

a smaller slope implies a larger change in x (^) j

x (^) j2 x (^) j Since the dose Q is the same, a lager Dt implies a smaller slope (i.e., more dopant spread-out) ∴ Process (ii) gives the greatest change in channel length

(c) With dose QT = Cs xj and the mobility constant, the sheet resistance Rs = 1/ (qμQT) = 1/ (qμCs xj). ∴ Cs = 1/(qμRs xj). The log (Cs) versus log (Rs xj) plot will be a straight line with a slope of -

log Cs

log R Xs j

slope = -