Yalamanchili
GEORGIA INSTITUTE OF TECHNOLOGY
School of Electrical and Computer Engineering
ECE 2030: Sections D
Spring 2008
Assignment #4
Due Date: Monday, March 31st, 2008 in class. No late assignments will be
accepted. Program is due electronically by midnite.
1. Consider the state machine described in class for recognizing the pattern 1101 in a serial
bit stream. Produce a logic implementation using D flip flops and gates for the following
different encoding schemes.
a. Binary encoded states
b. One-hot encoded states
c. Gray coded states (look up gray codes in the text).
Compare the three implementations in terms of time and space.
2. Show the design of the following memory systems using 1Gbit memory chips. Assume
the chips are organized a 256Mx4 bits.
a. Byte addressable 128 Mbytes (the system read/writes bytes)
b. 32Mwords where each word is 32 bits.
c. 16Mwords where each memory is 64 bits.
3. Find a data sheet from any memory supplier for an SRAM part (at least Mbytes in size).
Provide the supplier name and part number. Describe the internal organization in terms of
the sizes and number of memory banks, the number of addresses/chip, the number of bits
at each address, and the reported access times.
4. This question is to familiarize you with the SPIM directives for using the data segment
and the storage model. You will become familiar with the manner in which strings, bytes,
and words are stored in memory and understand addressing behavior of future SPIM
programs.
You are provided with a sample SPIM program (section webpage). Insert data directives as
defined in class, at the location identified in the program. Load and run the program (just open
the file and look for errors in the SPIM window). Run the program by executing Simulator Æ
Go (F5). In the subsequent dialog box, make sure the program start address is 0x00400000.
The program will print a header to the console window. When you are finished, the header
should look like this:
**********************************
