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Main points of this past exam are: Relative Accuracy, Average Step Size, Relative Accuracy, Handshaking, Complement Operation, Tri-State Buffer, Microcomputer
Typology: Exams
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College of Engineering Electrical Engineering and Computer Sciences Department
and 2R that permits N switches to control a binary sequence of currents Ii = I 0 2 i.
tion voltages. Also, the last transition voltage V(2N^ –2, 2N^ –1) minus the first transition voltage V(0,1), divided by 2N^ –2.
plotted as a function of n and a straight line passing through the first and last transition voltages.
ensuring accurate data transmission. Typical signals are “ready to send”, “ready to receive”, “data sent”, “data received”.
line is asserted, output = input. Otherwise the output is in a high-impedance state.
156V (p-p) 59-61 Hz
20R
Micro- computer
≈8V p-p
Timer/ Counter
8-bit parallel port (not used)
Comparator
2 Set counters 2 and 3 for cascaded upward counting at 1 MHz 3 Zero and arm all three counters 4 Latch and read counter 1 in a loop until it reads 1 5 Latch and read counters 2 and 3, pack bytes to produce a time T 6 Latch and read counter 1 in a loop until it reads 61 7 Latch and read counters 2 and 3, pack bytes to produce a time T 8 Compute power line frequency as 60 x 10^6 /(T2 – T1) [4 points off if the exact time of zero crossings not used. Counting the number of cycles in 1 sec gives only integer answers 59, 60, and 61- this is not accurate to 0.001 Hz.
59-61 Hz signal
Comparator output
Counter 1 (^0 1 2 )
Tri-state #
Tri-state #
16-bit parallel input
Timer
Hold mode, start conversion
End conversion, latch tri-state parallel output
End conversion, latch tri-state
Select #
Select #
2 Arm timer 3 Timer pulse puts both S/H in hold mode, starts both A/D converters 4 When conversion is complete, the two A/D converters strobe their data onto their respec- tive tri-state registers. 5 The next timer pulse is detected by the program, which has been looping to sense BISTROBE 6 Program puts out a pulse in output line #1 to select tri-state buffer #1, which asserts its data onto the 16-bit parallel input port 7 After a short delay to allow the data to settle, the program puts a pulse on output line #3, which is connected to BIHOLD and latches the data onto the 16-bit parallel input port 8 The program reads the input port 9 The program puts a pulse on output line #2 to select tri-state buffer #2, which asserts its data onto the 16-bit parallel input port 10 repeat steps 7 and 8 11 Repeat steps 3-4 and 5-10 which occur in parallel, so that the program is reading old data from the tri-state buffers during the 15 μs that it takes the A/D converters to convert new data. Steps 3-4 take 15 μs while steps 5-10 should take about 6 μs.
Method 2 (continuous mode); 1 Play the compact disk data through a standard compact disk player, which interpolates the steps in the D/A output waveform and low-pass filters to give a smooth analog waveform 2 Sample this waveform at 48 kHz and digitize [5 points off if a no interpolation or filtering used to smooth the higher harmonics caused by the abrupt edges of the 44 kHz D/A output steps. These higher frequencies can cause severe aliasing]
[15 points off if the DAT digital values are the same as the CD digital values]
145M Numerical Grades:
5/9 x Lab Lab Partic. Midterm #1 Midterm #2 Final Total Average 478 100 84 92 162 921 (B+) rms 23 0 12 4 28 53 Maximum 500 100 100 100 200 1000
145M Letter Grade Distribution
Letter Grade Course Totals (1000 max)
A+ 990 A 955, 958, 973 A– 935, 941, 943, 946, 946
B+ 919, 921 B 868, 880, 886, 897 B– none
C 772