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The solutions to exam two for the computer engineering course ece 2030 in spring 2011. It includes four problems with a total of 129 points, covering topics such as binary and hexadecimal notation, fixed-point representations, floating-point representations, arithmetic operations, logic gates, and circuits. Students are expected to understand concepts related to computer engineering, digital logic, and number systems.
Typology: Exams
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4 problems, 5 pages Exam Two Solution 9 March 2011 Problem 1 ( 3 parts, 31 points) Numbers of Reason Part A ( 13 points) Convert the following notations:
binary notation decimal notation 1 1100 1001. (^1001 457). 5625 1 1111 0001 497 1 1001.11 25. binary notation hexadecimal notation 101 1010 0101.0101 1010 101 5A5.5AA 1100 1010 0001 0001.1100 1010 1011 CA11.CAB
Part B (12 points) For the 25 bit representations below, determine the most positive value and the step size (difference between sequential values). All answers should be expressed in decimal notation. Fractions (e.g., 3/16ths) may be used. Signed representations are two’s complement.
representation most positive value step size unsigned fixed-point ( 20 bits). ( 5 bits) 1M^ 1/ signed integer ( 25 bits). (0 bits) 16M^1 signed fixed-point ( 13 bits). ( 12 bits) 4K^ 1/4K signed fixed-point ( 9 bits). ( 16 bits) 256 1/64K
Part C ( 6 points) A 25 bit floating point representation has a 17 bit mantissa field, a 7 bit exponent field, and one sign bit.
4 problems, 5 pages Exam Two Solution 9 March 2011 Problem 2 (3 parts, 24 points) “It doesn't add up” Part A (12 points) For each problem below, compute the operations using the rules of arithmetic, and indicate whether an overflow occurs assuming all numbers are expressed using a five bit unsigned fixed-point and five bit two’s complement fixed-point representations.
unsigned error? ■ no □ yes □ no ■ yes □ no ■ yes ■ no □ yes signed error? □ no ■ yes ■ no □ yes ■ no □ yes □ no ■ yes
Part B (6 points) The adder below adds two four bit numbers A and B and produces a four bit result S. Add extra digital logic to support subtraction as well as addition. Label inputs X 3 , X 2 , X 1 , X 0 , Y 3 , Y 2 , Y 1 , Y 0 , ADD / SUB and outputs Z 3 , Z 2 , Z 1 , Z 0.
Part C (6 points) Write two Boolean expressions indicating signed two’s complement addition and subtraction overflow using inputs X 3 , Y 3 , Z 3. These SOP expressions should be true when overflow occurs.
addition overflow = (^) X 3 Y 3 Z 3 + X 3 Y 3 Z 3 subtraction overflow = (^) X 3 Y 3 Z 3 + X 3 Y 3 Z 3
Cin
ADD/SUB
Cout
4 problems, 5 pages Exam Two Solution 9 March 2011 Problem 4 (3 parts, 21 points) “A chip off the old block” Part A ( 15 points) Consider the five definitions for the block drawn below. One block input is the logical value A. The other input is the control value C. The output behavior for each of the five definitions is given in the table. Complete the full truth table and state the logical (gate) names for each definition. (hint: the first block one appears to mask A when its control input is low.)
A IN C
A 0 0 A A A Zo A 1 A A 0 1 A
0 0 0 0 1 0 Zo 1 0 0 1 0 1 Zo 0 1 0 1 0 1 0 1 1 1 0 0 1 1
Part B ( 6 points) The circuit below is built using these blocks. Describe its behavior. Also give the circuits common name.
X
Y
i
IN Out C O
I N C O I N C O
I N C O^ IN
C O
i
X Y Out 0 0 Q 0 1 0 Q 0 0 1 0 1 1 1
It's a transparent latch