Lecture 1: Intro to the course
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Syllabus Schedule for Computer Microarchitecture | ECE 512, Study notes of Computer Architecture and Organization
Material Type: Notes; Class: Computer Microarchitecture; Subject: Electrical and Computer Engr; University: University of Illinois - Urbana-Champaign; Term: Fall 2003;
Typology: Study notes
Pre 2010
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Lecture 1: Intro to the course
Objectives of Lecture
• Overview • Logistics • Workload • Why performance? • How much performance?
Who Should Take this Course
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Anyone who is currently a research student in architecture and who has not yet beenexposed to the material.
-^
Anyone who thinks they want to be in category 1.
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Anyone who wants to be an architect of a future generation chip.
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I would discourage people who are casually interested because the class is beyond full.
-^
Prerequisite Knowledge
Basic CMOS circuits
Basic compiler optimization and code generation
Architecture: Tomasulo’s Algorithm, 2-level branch prediction, caching, pipelining,
Logistics
• Topical overview
– 6 major sections, 3 processor case studies – Heavy on the state of the art, some on the future
• Lectures
– Two days a week, discussion oriented, centered
around the readings
• Readings
– Should do readings prior to corresponding lecture
Why?
• Why Performance? • Why General-Purpose? • What are the constraints?
Advanced Computing Systems Group© 2003 Sanjay J. Patel
A decade of Intel x86 performance
10 1 100 Sep- Jan- Jun- Oct- Mar- Jul- Dec- Apr- Sep- Jan- Relative Processor Performance Based on SPEC 100 10 1 Relative FO4 Inverter Speed Pentium Pentium Pro Pentium II Pentium III Pentium IV FO4 Inverter Perform ance 70x performance in 10 years 800nm 600nm 350nm 250nm 180nm 130nm Relative Speed of FO4 Inverter