Synchronous Sequential Circuit Design-Programming and Computer Logic Design-Lecture Slides, Slides of Digital Logic Design and Programming

This lecture was delivered by Prof. Rohit Gill at Ankit Institute of Technology and Science for Computer Logic Design course. It includes: Synchronous, Sequential, Circuit, Design, Analysis, Outputs, Decision, Making, State, Mapping, Partitoning, Datapath, Control, Diagram

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2011/2012

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7/17/2012 55:032 - Introduction to Digital Design Page 1
Synchronous Sequential Circuit Design
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Download Synchronous Sequential Circuit Design-Programming and Computer Logic Design-Lecture Slides and more Slides Digital Logic Design and Programming in PDF only on Docsity!

7/17/2012 55:032 - Introduction to Digital Design Page 1

Synchronous Sequential Circuit Design

7/17/2012 55:032 - Introduction to Digital Design Page 2

Motivation

 Analysis of a few simple circuits

 Generalizes to Synchronous Sequential Circuits (SSC)

 Outputs are Function of State (and Inputs)

 Next States are Functions of State and Inputs

 Used to implement circuits that control other circuits

 "Decision Making" logic

 Application of Sequential Logic Design Techniques

 Word Problems

 Mapping into formal representations of SSC behavior

 Case Studies

7/17/2012 55:032 - Introduction to Digital Design Page 4

Complex Digital System = Datapath + Control

Registers

Combinational Functional

Units (e.g., ALU)

Busses

SSC generating sequences

of control signals

Instructs datapath what to

do next

The worker

The “Supervisor”

Status

Control

Control

Datapath

State Control Outputs

Status Inputs

Concept of the Synchronous Sequential Circuit

7/17/2012 55:032 - Introduction to Digital Design Page 7

Concept of the Synchronous Sequential Circuit

 Timing: When are inputs sampled, next state computed,

outputs asserted?

 State Time: Time between clocking events

 Clocking event causes state/outputs to transition, based on

inputs

 For set-up/hold time considerations:

 Inputs should be stable before clocking event

 After propagation delay, Next State entered, Outputs are

stable

 NOTE: Asynchronous output (Mealy) take effect immediately

 Synchronous outputs (Moore) take effect at the next clocking event

 E.g., tri-state enable: effective immediately

 sync. counter clear: effective at next clock event

7/17/2012 55:032 - Introduction to Digital Design Page 10

Sequential Circuit Analysis

 Start with schematic diagram

 Need to determine how circuit works

 Trace schematic, determine equations of operation

 FF input equations

 sequential circuit output equations

 Create State transition table

 Sequential circuit inputs, FFs are comb. logic inputs

 Organize truth table as current state (FFs) and inputs

 Create FF input, seq. Circuit output columns

 From FF char. Tables, determine FF next state values

7/17/2012 55:032 - Introduction to Digital Design Page 11

Sequential Circuit Analysis (cont.)

 Generate State Diagram

 Circles (nodes) represent current or present state values

 Lines (arcs) represent how state and output values change

  • Given the current state and current inputs, the next state and

output values are indicated by the associated arc

 State diagram can have different forms depending on the

type of sequential circuit output.

Present State Value

Next State Value

Inputs/outputs

7/17/2012 55:032 - Introduction to Digital Design Page 13

Example: Vending Machine SSC

General Machine Concept:

deliver package of gum after 15 cents deposited

single coin slot for dimes, nickels

no change

Block Diagram

Step 1. Understand the problem:

Vending Machine SSC

N
D

Reset

Clk

Open

Coin Sensor

Gum Release Mechanism

Draw a picture!

Basic Design Approach

7/17/2012 55:032 - Introduction to Digital Design Page 14

Tabulate typical input sequences:

three nickels

nickel, dime

dime, nickel

two dimes

two nickels, dime

Draw state diagram:

Inputs: N, D, reset

Output: open

Step 2. Map into more suitable abstract representation

Reset

N

N

N

D

D

N D

[open]

[open] [open] [open]

S

S1 S

S3 S4^ S5 S

S [open]

S

D

Vending Machine Example

7/17/2012 55:032 - Introduction to Digital Design Page 16

Step 4: State Encoding

Next State Q + 1 Q+ 0 0 0 0 1 1 0 X X 0 1 1 0 1 1 X X 1 0 1 1 1 1 X X 1 1 1 1 1 1 X X

Present State Q 1 Q 0 0 0

D 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
N 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Inputs Output Open 0 0 0 X 0 0 0 X 0 0 0 X 1 1 1 X

Vending Machine Example

State

NOTE! For D-FFs the next state will be what is at the D input. So each FF‟s next state values in the state table must be the D inputs for that FF.

D 1 D 0

7/17/2012 55:032 - Introduction to Digital Design Page 17

Step 5. Choose FFs for implementation D FF easiest to use

D1 = Q1 + D + Q0 N

D0 = N Q0 + Q0 N + Q1 N + Q1 D

OPEN = Q1 Q

8 Gates

CLK

OPEN

CLK

Q 0

D R

Q Q

D R

Q Q

\ Q (^1)

\reset

\reset \ Q 0

\ Q 0

Q 0

Q 0

Q 1

Q 1

Q (^1)

Q 1

D

D

N

N

N

\ N

D 1

D 0

Vending Machine Example

Q1 Q 00

D

D N

Q

N

Q

X X X X

01 11 10 00

01

11

10

Q1 Q 00

D

D N

Q

N

Q

X X X X

01 11 10 00

01

11

10

Q1 Q 00

D

D N

Q

N

Q

X X X X

01 11 10 00

01

11

10

7/17/2012 55:032 - Introduction to Digital Design Page 19

Derivation of JK Excitation Table

JK Characteristic Table JK Excitation Table

J 0 0 0 0 1 1 1 1 K 0 0 1 1 0 0 1 1 Q 0 1 0 1 0 1 0 1 Q+

0 1 0 0 1 1 1 0

Q+

0 1 0 1

Q

0 0 1 1

J

0 1 X X

K

X X 1 0

7/17/2012 55:032 - Introduction to Digital Design Page 20

Flip-Flop Excitation Tables

Q+

Q

J

X

X

K

X

X

S

X

R

X

T

D

You can use any FF type for your implementation

FF types can be mixed; I.e. in vending machinge

you could use a JK FF for Q 1 and a T FF for Q 0

7/17/2012 55:032 - Introduction to Digital Design Page 22

Vending Machine Example

Q1 Q 00

D

D N

Q

N

Q

X X 0 0

X X 0 0

01 11 10 00

01

11

10

X X X X

X X 0 0

J1 = D + Q0 N

K1 = 0

J0 = N + Q1 D

K0 = Q1 N

Q OPEN 1

\ Q 0 N

Q (^0) J K R

Q Q

J K (^) R

Q Q

Q 0 \ Q 1

\ Q 1

\ Q 0

Q 1

\reset

D

D

N

N

CLK

CLK

7 Gates

Q1 Q 00

D

D N

Q

N

Q

0 0 X X

0 1 X X

01 11 10 00

01

11

10

X X X X

1 1 X X

Q1 Q 00

D

D N

Q

N

Q

X 0 0 X

X 1 0 X

01 11 10 00

01

11

10

X X X X

X 0 0 X

Q1 Q 00

D

D N

Q

N

Q

0 X X 0

1 X X 1

01 11 10 00

01

11

10

X X X X

0 X X 1

Implementation:

7/17/2012 55:032 - Introduction to Digital Design Page 23

Definitions Moore Machine

Outputs are function

solely of the current

state

Outputs change

synchronously with

state changes

Mealy Machine

Outputs depend on

state AND inputs

Input change causes

an immediate

(asynchronous)

output change

State Register

Clock

State Feedback

X Inputs

Z Outputs

Moore vs. Mealy Machines

Combinational Logic for Next State (FF Inputs)

Comb. Logic for Outputs)

Mealy only; no connection for Moore