VERILOG TUTORIAL, Summaries of Design history

Download VERILOG TUTORIAL and more Summaries Design history in PDF only on Docsity!

VERILOG TUTORIAL

VLSI II

E. Özgür ATES

Outline

• Introduction
• Language elements
• Gate-level modeling
• Data-flow modeling
• Behavioral modeling
• Modeling examples
• Simulation and test

bench

• A design’s abstraction levels
• Behavioral Algorithmic: A model that implements a design algorithm in high-level language constructs RTL: A model that describes the flow of data between registers and how a design processes that data
• Gate-level: A model that describes the logic gates and the connections between logic gates in a design
• Switch-level: A model that describes the transistors and storage nodes in a device and the connections between them

Hardware Description Language

Verilog Hardware Description

Language

• Verilog was started initially as a proprietary hardware modeling language by Gateway Design Automation Inc. around 1984. It is rumored that the original language was designed by taking features from the most popular HDL language of the time, called HiLo, as well as from traditional computer languages such as C.
• Verilog simulator was first used beginning in 1985 and was extended substantially through 1987. The implementation was the Verilog simulator sold by Gateway. The first major extension was Verilog-XL, which added a few features and implemented the infamous "XL algorithm" which was a very efficient method for doing gate-level simulation.

Hardware Description Language

Hardware Description Languages describe the architecture and behavior of discrete and integrated electronic systems. Modern HDLs and their associated simulators are very powerful tools for integrated circuit designers.

Main reasons of important role of HDL in modern design methodology:

- Design functionality can be verified early in the design process. Design simulation at this higher level, before implementation at the gate level, allows you to evaluate architectural and design decisions.

Hardware Description Language

Verilog digital logic simulator tools allow you to perform the following tasks in the design process without building a hardware prototype:

**- Determine the feasibility of new design ideas

• Try more than one approach to a design problem
• Verify functionality
• Identify design problems**

Number Representation

549 // decimal number

'h 8FF // hex number

'o765 // octal number

4'b11 // 4-bit binary number 0011

3'b10x // 3-bit binary number with least significant bit unknown

5'd3 // 5-bit decimal number

-4'b11 // 4-bit two's complement of 0011 or 1101