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George Washington University (GW)

Prof. Thomas Farmer - Study notes

The content listed below has not been created by Thomas Farmer

Electrical and Electronics Engineering

Creating and Stimulating a 8-bit D-A Converter - Lab 8 | ECE 128

(2)

13 pag.

2009

Synopsys Tutorial: Using DFT and TetraMax - Laboratory | ECE 128

18 pag.

2009

VerilogA Lab: Creating and simulating an 8-Bit A-D Converter | ECE 128

(1)

10 pag.

2009

Importing Pad-Frame into Cadence - Lab 2 | ECE 126

(1)

13 pag.

2010

Mixed Signals Stimulation: Using Verilog as Input Stimulus - Lab 9 | ECE 126

10 pag.

2010

Creating the DSP System and Simulation Using Verilog-AMS | ECE 128

16 pag.

2009

NAND Gate Tutorial: Mixed Signal Simulation: Using Verilog Input Stimulus | ECE 126

12 pag.

2010

Synopsys Tutorial: Using the Design Compiler | ECE 126

(1)

10 pag.

2009

Logic Analyzer Tutorial: Using Agilent 16902B Logic Analysis System | ECE 128

16 pag.

2009

Creating Basic Analog Components: Inverter - Lab 2 | ECE 126

3 pag.

2009

ECE 126 Inverter Tutorial: Creating a Test Bench and Performing Transient Simulation - Pro

7 pag.

2010

Exporting Final Project from Cadence to GDS format: A Step-by-Step Guide for ECE Students

3 pag.

2010

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