MOSFET Bias Equations and Analysis for Given Circuit Parameters - Prof. William Leach, Assignments of Electrical and Electronics Engineering

The solutions to homework problems related to the biasing of a mosfet using given circuit parameters. The problems involve calculating the bias equation, id, and verifying the saturation region for different resistor values. Useful for students studying electrical engineering, specifically those focusing on mosfet circuits.

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Pre 2010

Uploaded on 09/17/2009

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ECE3050 Homework Set 5
1. For K=1.78 mA/V2,VTO =1.5V,V+=18V,R1= 110 k,R2=68k,RD=0,and
RS=1k, write the bias equation, solve for ID, and verify that the MOSFET is biased in the
saturation region, i.e. its active mode. [ID=3.897 mA,VDS =14.10 V,VGS VTO =1.480 V ]
2. Add a resistor R3from gate to source for the circuit in problem 1. (a) Show that
VGG =V+R2k(R3+RS)
R1+R2k(R3+RS)+IS
RS
RS+R3+R1kR2
×R1kR2
RGG =R1kR2k(R3+RS)
VSS =V+
R1+R2k(R3+RS)×R2
R2+R3+RS
×RS
RSS =(R1kR2k+R3)kRS
(b) For R3=20k, write the bias equation, solve for ID, and verify that the MOSFET is
biased in the saturation region. [ID=0.492 mA,VDS =17.41 V,VGS VTO =0.526 V]
3. Add a resistor R4from drain to source for the circuit in problem 1. Show that
VSS =V+RS
RD+R4+RS
ID
RD
RD+R4+RS
RS
RSS =RSk(R4+RD)
VDD =V+R4+RS
RD+R4+RS
+IS
RS
RD+R4+RS
RD
RDD =RDk(R4+RS)
1

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ECE3050 Homework Set 5

  1. For K = 1.78 mA/ V^2 , VT O = 1.5 V, V +^ = 18 V, R 1 = 110 kΩ, R 2 = 68 kΩ, RD = 0, and RS = 1 kΩ, write the bias equation, solve for ID, and verify that the MOSFET is biased in the saturation region, i.e. its active mode. [ID = 3.897 mA, VDS = 14.10 V, VGS −VT O = 1.480 V]
  2. Add a resistor R 3 from gate to source for the circuit in problem 1. (a) Show that

VGG = V +^

R 2 k (R 3 + RS ) R 1 + R 2 k (R 3 + RS )

+ IS

RS

RS + R 3 + R 1 kR 2

× R 1 kR 2

RGG = R 1 kR 2 k (R 3 + RS )

VSS =

V +

R 1 + R 2 k (R 3 + RS )

×

R 2

R 2 + R 3 + RS

× RS

RSS = (R 1 kR 2 k + R 3 ) kRS

(b) For R 3 = 20 kΩ, write the bias equation, solve for ID, and verify that the MOSFET is biased in the saturation region. [ID = 0.492 mA, VDS = 17.41 V, VGS − VT O = 0.526 V]

  1. Add a resistor R 4 from drain to source for the circuit in problem 1. Show that

VSS = V +^

RS

RD + R 4 + RS

− ID

RD

RD + R 4 + RS

RS

RSS = RS k (R 4 + RD)

VDD = V +^

R 4 + RS

RD + R 4 + RS

+ IS

RS

RD + R 4 + RS

RD

RDD = RDk (R 4 + RS )