Download 8-Bit 4 to 1 Multiplexer and more Exams Logic in PDF only on Docsity!
8-Bit 4 to 1 Multiplexer
In this 8-Bit 4 to 1 Multiplexer, there are 4 inputs, each with 8 bits, 2 selectors, and 1 8-Bit output. In HADES, 4 8-Bit input vectors were created to represent each input on the multiplexer and 8 1- Bit 4 to 1 Multiplexers were used to create an 8-Bit output vector. Vector expanders were used to separate each vector into their bits and a bit merger was used to create an output vector. The corresponding bits from each vector (A 0 , B 0 , C 0 , D 0 ) were matched to the corresponding inputs on the 1- Bit 4 to 1 Multiplexer as well as matching the selectors to the selector inputs. When the selectors are set to 00, each bit of the first input vector, AVec, will match up with the output vector, OVec (A 0 – O 0 , A 1 – O 1 , etc.) The selectors’ value corresponds to each vector, using S1 S0 as the value (S1=0 S0=0 -> AVec; S1=0 S0=1 -> BVec; S1=1 S0=0 -> CVec; S1=1 S0=1 -> DVec).
8-Bit 4 to 1 Multiplexer Waveform
Part 1:
Part 2:
When assigning and naming probes, HADES refused to let me name the probes. I inquired some other students, many who ran into the same problem, and searched online to find out how to name the probes. My search came to no avail. Therefore, I will give a key for the probes: (n44 = AVec, n43 = BVec, n42 = CVec, n45 = DVec, n2 = Sel1, n0 = Sel0, n46 = OVec). I chose to keep AVec = 4, BVec = 2, CVec = 5, and DVec = 6 for the first 11 seconds. I changed the selector values to 00, 01, 10, and 11 to display that the OVec will be equal to the vector the selectors point to as set up in the circuit. Then I decided to set the selector values constant and changing the vector it corresponds to. While the selectors were valued at 00, AVec was changed from 4, to 5, 6, 7, 8, 7, 6, 5, and then back to 4. The OVec changed with the AVec. This is the same with each value of the selectors and the vectors they correspond to.
Shown below is the 1-Bit 4 to 1 Multiplexer used in my 8-Bit 4 to 1 Multiplexer. In the 1-Bit 4 to 1 Multiplexer, there are 4 1-Bit inputs, 2 selectors, and 1 1-Bit output. The selector values correspond to an input (00 = i0, 01 = i1, 10 = i2, 11 = i3). Inverters are used so that when a selector value is equal to 0, it is equal to 1 on the AND gate. For example, when the selector value is 00, two inverters are used to make the value 11 and for that value to be ANDed with i0. Therefore, if i0 is 0, so is the output. Or if i0 is 1, the output is also 1. This is true for each input and its corresponding selector value.
8-Bit Adder
In the 8-Bit adder, two 8-Bit vector inputs are added together and create a 9-Bit output. The reason two 8-Bits need a 9-Bit output is because there is a carry out, which can be a 1 if A 7 and B 7 are both 1, creating the need for an extra bit. The two 8-Bit vectors are expanded into their bit values and each corresponding bit value (A 0 + B 0 , A 1 + B 1 , etc.) is added together using a half adder for the first two bits, as no carry in is needed, and full adders for the rest of the bits. The added bits, S 0 – S 8 , with S 8 being the carry out, are merged together to form a 9-Bit vector, SVec. The carry out from the half adder is connected to the carry in of the full adder. The carry out of each full adder is connected to the next full adder as the carry in. The last full adder’s carry out is S 8.
8-Bit Adder Waveform
As with the previous waveforms, HADES would not allow name changes of the signals, so the key is as follows: (n7 = AVec, n8 = BVec, n20 = SVec). AVec was set to 10101010, or 169, and BVec was set to 01010101, or 85. When added together, this makes 11111111, or 254, as shown in the waveform. When the values of AVec or BVec are changed, the SVec changes to the corresponding value. The reason for the 9 th^ bit is shown in the waveform as well. When AVec is 10101011, or 170 in decimal, and BVec is 01010101, or 85 in decimal, SVec is 255 in decimal, or 100000000. When AVec stays at 10101011 and BVec is increased by 1, SVec also increases by 1. The same is true if BVec is decreased, causing SVec to decrease.
Half Adder
In the 8-Bit adder, the first bit of each vector is added with no carry in through this half adder. Two inputs are put through an XOR gate and the output is the 1-Bit sum. The two inputs are also put through an AND gate to check for the carry out. If both inputs are 1, then the carry out is 1. Otherwise, the carry out is 0.
Half Adder Waveform
As HADES would not allow probe naming, the key for the probes is as follows: (n2 = A, n0 = B, n = S, n3 = C). When 0 is added with 1, S is 1 and C is 0, showing that 1 + 0 = 01. When 0 is added with 0, S is 0 and C is 0, showing that 0 + 0 = 00. When 1 is added with 1, S is 0 and C is 1, showing that 1 + 1 = 10.
This full adder was used in the 8-Bit adder, as shown below. A 1 – A 7 were added to B 1 – B 7 , creating a sum, and a carry out, as well as having a carry in from the previous adder. There are three inputs, with one being a carry in, and two outputs, a sum and a carry out. The two bits are put through an XOR gate, just as in the half adder, and is put through another XOR gate with the carry in to give the sum. The carry in is put through an AND gate with the XOR of A and B. A and B are also put through an AND gate. Both AND gates are put through an OR gate to determine if the carry out is 1 or 0.
