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Supporting Chips Supporting Chips
8284 CLOCK GENERATOR8284 CLOCK GENERATOR
AND DRIVERAND DRIVER
Kuliah Pertemuan IV
Sistem Berbasis
Mikroprosesor
Lie Jasa
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T T T 1/2 T
SIGNAL CLOCKSIGNAL CLOCK
BERUPA GELOMBANG KOTAK DENGAN PERIODE T YANG TERDIRI DARI ½ GELOMBANG + DAN ½ GELOMBANG NEGATIF
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SIGNAL CLOCKSIGNAL CLOCK
Misalkan Frekwensi kristal = 15 MHz
T = 1 / [ 15 x 10 6 ] detik
T = 1 / F detik
T = 0,06666 micro detik ½ T = 0,033333 micro detik
T 1/2 T
0,06666 mikro detik
0,03333 mikro detik
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1 X f
2 X f
4 X f
PerkalianPerkalian frekwensifrekwensi
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SIGNAL CLOCKSIGNAL CLOCK
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8284 CLOCK GENERATOR AND DRIVER 8284 CLOCK GENERATOR AND DRIVER
- an 18-pin chip
- specially designed to be used with 8088/
microprocessors,
- It provides the clock and synchronization for the
microprocessor,
- also provides the READY signal for the insertion
of wait states into the CPU bus cycle.
- A description of each pin and how it is
connected in the IBM PC follows.
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Input pins Input pins
- RES (reset in)
- This is an input active-low signal to generate RESET.
- In the IBM PC, it is connected to the power-good signal from the power supply.
- When the power switch in the IBM PC is turned on, assuming that the power supply is good,
- a low signal is provided to this pin
- and the 8284 in turn will activate the RESET pin,
- forcing the 8088/86 to reset; then the microprocessor takes over. This is called a cold boot.
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Input pins Input pins
X1 and X2 (crystal in)
- XI and X2 are the pins to which a crystal is attached.
- The crystal frequency must be 3 times the desired frequency for the microprocessor.
- The maximum crystal for the 8284A is 24 MHz and 30 MHz for the 8284A-1.
- The IBM PC is connected to a crystal of 14.31818 MHz. For some turbo compatibles, it is 24 MHz.
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Input pins Input pins
• CSYNC
(clock synchronization)
- This active-high signal
- is used to allow several 8284 chips to be connected together and synchronized.
- The IBM PC only uses one 8284; therefore, this pin is connected to low.
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Input pins Input pins
- RDY1 and AEN
- RDY1 is active high and AEN (address enable) is active low.
- They are used together to provide a ready signal to the microprocessor,
- which will insert a WAIT state to the CPU read/write cycle.
- In the IBM PC, RDY1 is connected to DMAWAIT and AEN1 is connected to RDY/WAIT.
- They allow the wait state to be inserted either by the CPU or by DMA.
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Input pins Input pins
- RDY2 and AEN
- These function exactly like RDY and AEN1.
- These extra RDY and AEN signals are provided to allow for a multiprocessing system.
- It allows other general-purpose CPUs such as the 8088/86 to gain control over the buses.
- In the IBM PC, RDY2 is connected to low, AEN2 is connected to high, which permanently disables this function since there is only one 8088/86 microprocessor in the system.
- In cases of multiprocessor systems, these signals are used to coordinate access over the buses by different CPUs
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Input pins Input pins
• ASYNC
- This is called ready synchronization select.
- An active low is used for devices that are not able to adhere to the very strict RDY setup time requirement.
- In the IBM PC this is connected to low, making the timing design of the system easier with slower logic gates.
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Output signals Output signals
- CLK (clock)
- This is an output clock frequency equal to one-third of the crystal oscillator, or EFI input frequency,
- with a duty cycle of 33%. This is connected to the clock input of the 8088/86 and all other devices that must be synchronized with the CPU.
- In the IBM PC it is connected to pin 19 of the 8088 microprocessor and other circuitry under the CLK88 label.
- This frequency, 4.772776 MHz (14.31818 divided by 3), is the processor frequency on which all of the timing calculations of the memory and I/O cycle are based.
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Output signals Output signals
- PCLK (peripheral clock)
- This frequency is one-half of CLK (or one-sixth of the crystal) with a duty cycle of 50% and is TTL compatible.
- In the IBM PC this 2. MHz is provided to the 8253 timer to be used to generate speaker tones, and other functions
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Output signals Output signals
• READY
- This signal is connected to READY of the CPU.
- In the IBM PC it is used to signal the 8088 to indicate if the CPU needs to insert a wait state due to the slowness of the devices that the CPU is trying to contact.
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Example Example
A certain IBM PC/XT compatible turbo computer has a crystal of 24-MHz frequency for the XI, X2 inputs to the
- Calculate the frequencies provided by the outputs of: (a) OSC (b) CLK (c) PCLK Solution: (a) OSC=24 MHz frequency, same as the crystal frequency (b) CLK=8 MHz, one-third of the crystal frequency of 24 MHz
(c) PCLK=4 MHz, one-sixth of the crystal frequency of 24 MHz
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IMPLEMENTASI TUGASIMPLEMENTASI TUGAS
Trafic Light
Uji Coba TL
Rangkaian Relay
Interface LPT
