Exercises Computation II 5EIB0
Questions
Question 1
We compare 3 different implementations of the MIPS architecture, the single cycle, the multi-
cycle and the (5-stage) pipelined implementation, all implemented in the same technology. All
run the same MIPS program. This program contains 20% load, 10% store, 20% control, and 50%
other
instructions. On the multi-cycle implementation loads take 5 cycles, control instructions 3 cycles,
and all others 4 cycles. To make the exercise easier you may ignore all hazards and pipeline
register overhead.
Can you fill in the open fields in the next table.
N_instructions CPI T_cycle T_execution
------------------------------------------------------------------
Single cycle 10000 - 2.0 ns -
Multi cycle - - - -
Pipelined - - - -
Question 2
A Pentium-4 processor is a so-called 3-issue machine. It has 20 pipeline stages. It uses branch
prediction, with a correct branch prediction rate of 95%. A correctly predicted branch has no
penalty, however a wrongly predicted branch has a penalty of 19 cycles. 15% of the instructions
are branches.
a. What is its ideal CPI of a Pentium-4?
b. What is the CPI if we take branches into account, but ignore all other hazards.
