Download VHDL Implementation of Flip Flops and Latches: A Comprehensive Guide and more Lab Reports Data Structures and Algorithms in PDF only on Docsity!
EXPERIMENT OF RESULT OF FLIP FLOPS
AND LATCHES
Aim: To write the VHDL code fo flip flops and latches
FLIP FLOPS
A flip flop is a synchronous electronic circuit with two stable states that can be used to store binary data. The data stored can be changed by applying varying combinations of inputs. These are the fundamental building blocks and basic storage elements in sequential logic. All flip flops can be divided into four basic types namely JK, D, SR and T flip flops. JK FLIP FLOP: Due to the unrefined state of the SR flip flop, the JK flip flop was made as an improvement to the SR flip flop where S=R=1 was not a problem. In the JK flip flop, the input condition J=K=1 gives an output inverting the output state. If the J and K inputs are different, then the output Q takes the J value at the next clock edge. If J=K=0, then there is no change. Truth table: J K Q Qโ 0 0 0 0 0 1 0 0 1 0 0 1 1 1 0 1 0 0 1 1
VHDL :
Wave form: The last two waveforms are the outputs Q and Qโ. The red portion shows an unknown value or no change in state.
Wave form: The premier wave is the D input and the proceeding is the Clock. The last wave is the Q output.
SR FLIP FLOP:
The SR flip flop is the most common type of flip flop to find in electronics. The inputs โSโ and โRโ are combined to produce an output โQโ. When โSโ is set high , or set to logic one, the output โQโ would be high and its complement โ Qโ โ would be low, thus the two outputs are the inverse of each other. Truth table: S R Q Qโ 0 0 0 1 0 1 0 1 1 0 1 0 1 1 โ
VHDL :
Wave form: In the wave above, the first two wave diagrams represent the R and S inputs and the third wave form is the clock timing, the last two wave form are the outputs Q and Qโ.
VHDL :
Wave form: The first two wave diagrams are the T input and Clock inputs respectively. The last input is the output Q.
LATCHES:
A latch is also an electronic circuit that can be used to store binary data. The difference between a latch and a flip flop is a gating or clocking mechanism. The flip flop is gated whereas the latch is not. Two types of latches are commonly found in electronics. They are D and SR latches. D LATCH: A D latch is a modification of a gated SR latch where the R input has been replaced with the complement of the old S input and the S input has been renamed to D. The D latch is constructed such that there are no invalid or illegal states. When the enable input is low, it simply stays in its previous state. When the enable input is one, however, the output Q follows the enable input. Truth table: E D Q Qโ
SR LATCH:
An SR latch is basic latch or bistable multivibrator with two states set and reset. The SR latch can be constructed using NOR gates where the output of either S or R inputs through the NOR gates are fed back to each other as inputs. Truth table: S R Q Qโ 0 0 No change No change 0 1 0 1 1 0 1 0 1 1 Invalid Invalid VHDL :
Wave form: The first two wave diagrams are the R and S inputs whilst the last two are the equivalent outputs Q and Qโ.
