Latches and Flip-Flops: Fundamentals of Digital Logic, Lecture notes of Digital Systems Design

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LATCHES & FLIP FLOPS

Combinati onal Logic Storage Elements Inputs Outputs State Next State

Sequential Circuits

Basic Concept of Storage ( Memory)

 It should be able to hold a value

 One should be able to read the value stored

 One should be able to change the value.

Basic Concept of Storage

(one bit memory)

 The circuit remembers Q (never changes as long as powered on) as well as Q’.  We can read Q by checking the output.  You can’t decide the value!

Q’ Q

Q

Q’

Q

Q’

R

S

Q

next

= (R + Q’

current

Q’

next

= ( S + Q

current

S R Q

S R Latch

No change Not recommended

1 0 O

No Change 0 0 Not Reccomm

S R Q

NAND Based Latch

S

R

Q

Q’

Q Q’ R S S R Q 0 0 no change 0 1 0 1 0 1 1 1 NR S’ R’ Q Q’ S’ R’ Q 0 1 1 1 0 O 1 1 No Change ’ Q Q’ S R CLK CLK S R Q 0 X X No change 1 0 0 No change 1 0 1 0 1 1 0 1 1 1 1 Not to apply.

CLK D Q 0 X No change 1 0 0 1 1 1

D LATCH

S’

R’

Q

Q’

CLK

D

K CP J Q Q’ S R RACE AROUND CONDITION

Latches are “transparent” (any change on the inputs is seen at the outputs immediately). This causes synchronization problems! Solution: use latches to create flip-flops that can Respond ONLY on clock transitions

Latches Vs Flip-flops

Q Qin Q’in

Q

Q’

S

R

D

C

C

D

CLK

Master Slave Configuration

What happens when CLK is logic 0

Master enabled and slave disabled

Slave maintains the output

J K Flip Flop

J K Q Q

J K Flip flop

J K CLK Q(t+1) Comments

0 0  Q(t) No change

0 1  0 Reset

1 0  1 Set

1 1  Q(t)' Toggle

Characteristic Table