Download Logic Gates: A Practical Guide with Experiments and more Exams Digital Logic Design and Programming in PDF only on Docsity!
Experiment No.:
Aim: To study Logic gates
Apparatus: 7400, IC7402, IC7404, IC7432, IC7486, IC7408, Register, Power Supply 5V, Bread board , LED &
connecting wires.
Theory: 1. AND Gate(IC 7408)
Logic Gate in which input A=1, B=
If anyone i/p is 0 i.e, when Q1 is OFF or Q2 is OFF & o/p is y=0. If i/p A=1 i.e, i/p B=1 then Q1 is ON & Q2 is ON.
Circuit Diagram:
2) OR Gate: (IC 7432)
Theory:
Logic gate in which if i/p A=1 or i/p B=1 then o/p=1 is called as OR gate.If A=B=
the transistor Q1 & Q2 is off so o/p y=0.
If i/p A=1 or if B=1 then Q1 is ON or Q2 is ON so o/p y is correct.
Circuit Diagram:
3) NOT Gate: (IC 7404)
Theory: It is called as inverter. When I=0 the o/p y=5V. If i/p A=1 then transistor Q is also
0 o/p is connected to ground.
Circuit Diagram:
Circuit Diagram:
6) NOR Gate:(IC 7402)
Theory: The NOT-OR operation is also called as NOR operation. It is reverse of OR gate operation & is
obtained by inverter connected to o/p of OR gate & given by y=(A+B)
Circuit Diagram:
Procedure :
1. Connect the LED & resistor in series with o/p of IC.
2. Ground pin no. 7 & connect Vcc=5V to pin no. 14 of the IC.
3. Draw the truth table for respective IC
4. Give the i/p according to respective truth table
5. verify the truth table.
Conclusion:
All gates are studied & truth tables are verified.
Experiment No.:
Aim: To realise given equation y=AB + BC using basic gates & NAND gates.
Apparatus: IC7432, IC7408, IC 7404, IC7400,Register, Power Supply 5V, Bread board , LED & connecting
wires.
Truth Table:
A B C Y= AB+BC
Theory:
Procedure:
1. Connect the circuit as shown in circuit dig.
2. Verify the truth table.
Conclusion:
From the above experiment, we realise the given equation using basic gates y= AB+BC.
Experiment No.:
Aim: To design a circuit for Half Adder, Half subtractor, Full Adder, Full subtractor.
Apparatus: IC7432 , IC7408, IC 7404, Register, Power Supply 5V, Bread board , LED &
connecting wires.
Theory:
HALF ADDER
One function of adder circuit is to add given numbers. This is basic building block for
addition of two single bit numbers. The truth table shows two i/p’s A & B and two o/p’s Sum &
Carry. Drawback of this ckt. is multibit addition.
It does not look after carry, say if we want to add A & B in the next stage to add 3-
bits A,B,C which will not be done by circuit. Therefore, we have to design 3 bit adder circuit
which is named as Full adder.
Truth Table:
A B Sum Carry 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1
FULL ADDER
To overcome the drawback of half adder, we will design 3 bit adder which will consider carry which comes from the previous bit.
A B C Sum Carry 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Truth Table:
Full Subtractor : In half subtractor there is no provision to subtract the previous borrow, so we use full subtractor.
A B C Diff Borrow 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 0 1 0 1 0 0 1 1 0 0 0 1 1 1 1 1
CIRCUIT DIAGRAM:
PROCEDURE:
1. Connect the circuit as shown in circuit dig. for half adder, full adder, half
subtractor & full subtractor.
2. Verify the respective truth table.
CONCLUSION:
Thus we have design a circuit for half adder, full adder, half subtractor & full subtractor and
verified the truth tables.
Experiment No.:
Aim: To design & implement 4 bit parity generator using minimum number of gates.
Apparatus: IC7486, Register, Power Supply 5V, Bread board, LED & connecting wires.
Theory:
Parity Bit:
To get even or odd parity we have to take extra bit & that extra bit is called as
parity bit. If the total no of 1’s in a given no is even then it is called even parity & if the total no
of 1’s are odd then it is called odd parity.
In the truth table below we have consider four input variables A, B, C, D &
two o/p variables F(O)& F(E) for odd & even parity respectively. We will obtain the equation
for even & odd parity by using k-map & that equation by using the gates.
Procedure:
1. Connect the circuit as shown in fig.
2. Apply +5V to Vcc & -5V to ground.
Conclusion:
Thus we have designed & implemented 4 bit parity generator using Ex-OR gate.
Experiment No.:
Aim: To study multiplexer to realise that f(A,B,C,D)=∑ M (0,1,2,3,8,9,11,13,14) using
16:1multiplexer.
Apparatus: IC 75150 Register, Power Supply 5V, Bread board , LED & connecting wires.
Theory:
Multiplexer or data selector is very popular & most widely used in combinational circuit. It has multiple i/ p’s & one o/p. It accepts several data i/p & allows one of them at a time to get through to o/p. The routing of derived data i/p to o/p is controlled by select line.
In this select lines will decide which data i/p (D (^) n-1- D 0 ) will appear over o/p. The 16:1, 8:1,4:1 & 2:1 Mux are available. The only change will be the no of select lines & data lines increases. Basic block dig is as shown.
16:1 MUX
Truth Table:
A B C D Y
Procedure:
1. Connect the circuit as shown in fig.
2. Apply high or low select i/p as given.
3. Verify the truth table.
Conclusion:
Experiment No.:
Aim: To design & implement BCD to Gray code converter using demultiplexer.
Apparatus: IC74154(1:16) demux, ,Register, Power Supply 5V, Bread board , LED &
connecting wires.
Theory: Demultiplexer
A demux perform opposite operation of the mux. i.e, it is having one i/p & several o/
p’s. The o/p can be related by means of control i/p. The truth table for 1L:4:L demux is shown. If
select line AB=11 o/p D 3 will be selected. If i/p E is used as enable i/p the demultiplexer is
decoder. Demultiplexer/decoder can be used to implement logic function. They can be combined
in the form of trees.
Truth Table:
Cicuit Diagram:
BCD to Gray code converter
BCD CODE GRAY CODE
A B C D X Y Z W
Procedure:
1. Connect the circuit as shown in fig.
2. Verify the truth table.
Conclusion:
Thus we have designed & implemented BCD to Gray code converter using demultiplexer.
Procedure:
1. Connect the circuit as shown in fig.
2. Verify the truth table.
3. Observe the result.
Conclusion:
Thus we have designed JK FF using NAND gates.
