HDL Design and Verification: A Comprehensive Guide, Slides of Verilog and VHDL

An overview of hdl (hardware description language) design and verification. It covers the basics of digital systems, the design process, and various hdls including vhdl and verilog. Students will gain a solid understanding of hdls and their role in digital system design.

Typology: Slides

2012/2013

Uploaded on 05/07/2013

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Download HDL Design and Verification: A Comprehensive Guide and more Slides Verilog and VHDL in PDF only on Docsity!

HDL Desing and Verification

Lecture Overview

• Course Intro/ Syllabus/ Grading Policy

• General Intro to Digital Design

• Backgound

Intro

• What is a digital system?

  • Digital (Webster)
  • System

Intro

  • What is a digital system?
  • Digital (Webster) – Of or relating to the technology of computers and data communications wherein all information is encoded as bits of 1s and 0s that represent on or off states. Contrast with analog. Digital implies discrete states.
  • System – A composite of equipment, skills, techniques, and information capable of performing and/or supporting an operational role in attaining specified management objectives. A complete system includes related facilities, equipment, material, services, personnel, and information required for its operation to the degree that it can be considered a self-sufficient unit in its intended operational and/or support environment.

Digital System Design Process

  • “Design is a series of transformations.” At each

step decisions are made that bind the design, moving it toward an implementation. Design begins at a high level of abstraction and moves to a very detailed level of abstraction. Idea

Possible Implementations

Digital System Design Process

  • “Design is a series of transformations.” At each

step decisions are made that bind the design, moving it toward an implementation. Design begins at a high level of abstraction and moves to a very detailed level of abstraction suitable for implementation. Idea

Possible Implementations

Design Decisions

HDL Design Process

  • Start with design idea
  • Do a behavioral design for reference
  • RTL level design
    • Design data path
    • Design control path
  • Use a synthesis tool to produce a gate netlist
  • Physical Design – place gates and wire
  • Production

An example

• From ASiC Technology & News – “Why

ASICs fail in the system.

  • Listen to story about a design that ….

• Key points from story.

  • “Designers knew design was right”
  • “found a functional error”
  • Chips still exploded.
  • Months passed slowly.

PAST HDLs

  • ISPS – Instruction

Set Processor Specification

  • Language for describing the behavior of digital systems
  • Developed at CMU
  • Based on ISP notation

PAST HDLs

  • AHPL – A Hardware

Programming Language

  • Designed for representation in an academic environment
  • Developed at the University of Arizona.

Other HDLs

  • CDL – Computer Design Language
    • A dataflow language – no hierarchy
  • CONLAN – Consensus Language
    • Attempt to establish a standard language. Family of languages for describing hardware at various levels of abstraction.
  • IDL – Interactive Design Language
    • Internal IBM – Supports Hierarchy – Originally designed for generation of PLAs, then extended
  • TEGAS – Texas Instruments Hardware Description Language - Internal TI – Multilevel language for design and description – hierarchical

Other HDLs (cont)

• ZEUS
  • GE language – hierarchical – functional descriptions – structural descriptions – No provision for gate delay specification or timing constraints – Does not support asynchronous designs.
  • Verilog
  • Hierarchical – Developed by Cadence Design Systems – Procedural descriptions for behavior – Built in features for timing and a fixed logic value system. Now also a standard. Used by ~60% of market.
  • UDL
  • Standard language that was developed in Japan – hierarchical – 1 to 1 mapping of language constructs to hardware structures – Designed for synthesis
  • System C
  • NEW – now also a standard and supported by tools – had penetrated to about 10% to 15 % of the market.

VHDL features

  • Procedural Features
    • Would make a very good concurrent programming language. Up until now file I/O support was poor.
  • Dataflow design
  • Structural – Hierarchy
  • Self defined Value System and capability to design your own if you would need to. - A valuable feature of the language
  • Semantics and Paradigm formally defined in LRM

In Summary

• There is no way we would have systems of

today’s complexity without the development

and evolution of HDLs.

• HDLs are living languages.

  • Evolution shown in 2008 standard – 140%

increase.

• Today’s systems are just too complex to stay

with the design methodologies of the 1980s

and even to early 1990s.

  • Consider the time to design a modern processor!