Optrex Corporation - Study Notes - Fall 1996 | EECS 373, Study notes of Electrical and Electronics Engineering

Material Type: Notes; Class: Des Microproc Syst; Subject: Electrical Engineering And Computer Science; University: University of Michigan - Ann Arbor; Term: Unknown 1996;

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DMF 5000 SERIES
USERS MANUAL
OCTOBER 1996
OPTREX CORPORATION
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DMF 5000 SERIES

USERS MANUAL

OCTOBER 1996

OPTREX CORPORATION

TABLE OF CONTENTS

1. Outline of LCD Module

The DMF 5000 series dot matrix graphic LCD modules include an LCD controller, a display RAM, a character generator ROM, and drive circuits. These modules are suitable for copiers, facsimiles, PBXs, marine instruments, and messaging displays for various instruments.

1.1 Features

  1. Excellent readability and high contrast ratio.
  2. bit parallel bus interface.
  3. Built-in LCD controller T6963C and display RAM (8K byte).
  4. Large graphic display.
  5. Various attribute functions.
  6. Built-in 128 word character generator ROM, and 256 word (max.) character generator RAM.
  7. Wide operating temperature range.
  8. Compact and easily mountable on any equipment.

2. Specification

2.1 Maximum Ratings

Item Symbol Min. Max. Unit Notes Supply Voltage (Logic)

Vcc-Vss -0.3 7 V

Supply Voltage Vcc-Vee Vcc +0.3 28 V (LCD Drive) (^) Vcc-Vadj 0 28 V

Input Voltage Vi -0.3 Vcc +0.3 V Topr 0 +50 °C Operating Temperature Topr +10 +40 °C

CCT

Backlight Type Storage Temperature

Tstg -20 +60 °C

Make sure not to exceed above maximum rating values under the worst probable conditions.

2.3 LCD Driving Voltage and Connection

The LCD Panel is driven by the voltage Vcc-Vee or Vcc-Vadj. Adjustable Vee or Vadj is required for contrast control and temperature compensation. Table 2.1 is a recommended power supply voltage for the LCD drive (Vcc-Vee or Vc c-Vadj).

Table 2.

Temp.

Model

0 °C 10 °C 25 °C 40 °C 50 °C Note

DMF5001N Series (Vcc-Vadj)

23.2V 20.3V 18.3V 1/128 Duty

DMF5002N Series (Vcc-Vadj)

22.4V 19.7V 17.6V 1/112 Duty

DMF5003N Series (Vcc-Vadj)

19.6V 18.4V 17.4V 1/128 Duty CCT Backlight

DMF5005N Series (Vcc-Vee)

14.8V 13.6V 12.3V 1/64 Duty

DMF5010N Series (Vcc-Vee)

14.4V 13.6V 12.8V 1/64 Duty CCT Backlight

Consult your local Optrex representative to obtain detailed specifications for each module part number.

Example of power Supply Connection:

+5V

GND

R

VR Tr

-12V

+5V

GND

R

VR

-21V

Note: R: 5KΩ - 10KΩ VR: 10KΩ - 20KΩ Tr: 2SA, 1162Y etc.

Vcc DMF5005N DMF5010N Vss Series

Vee

Vcc

DMF5001N Vss DMF5002N DMF5003N Series

Vadj

Vee

2.5 CCT Back Light

Recommended Inverter and Connection

+24VDC VIN OUT 1 DMF5003N

DMF5010N

CXA-

(TDK) OUT 2

GND GND SERIES

OUT

GND

CXA-1301 Specification

VIN OUT 1

OUT 2

GND OUT GND

Bottom View

Maximum Ratings

Input Voltage 26.4VDC Output Power Consumption 5W Storage Temperature -20 - 75 °C Operating Temperature 0 - 50 °C

Acceptable Operating Range

Input Voltage 24 ±1.2VDC

3. Interface

3.1 Interface Connection

DMF 5001N, 5002N, 5003N Series Pin No. Symbol Level Function 1 FG - Frame Ground (Connected to Metal Holder) 2 VSS - Ground (Signal Ground) 3 VCC - Power Supply (Logic, LCD Drive) 4 VADJ - Power Supply for LCD Contrast Adjust 5 VEE - Power Supply (LCD Drive)

6

__

WR L Data Write (Write Data to the Module at “L”)

__

RD L Data Read (Read Data from the Module at “L”)

__

CE L Chip Enable for the Module

_

C/D H/L

WR=“L”; C/D=“H”: Command Write, C/D=“L”: Data Write RD=“L”; C/D=“H”: Status Read, C/D=“L”: Data Read

10

____

HALT L Stop the Oscillation of Clock

______

RESET L Controller Reset 12 Dφ H/L Data Input/Output (LSB) 13 D1 H/L Data Input/Output 14 D2 H/L Data Input/Output 15 D3 H/L Data Input/Output 16 D4 H/L Data Input/Output 17 D5 H/L Data Input/Output 18 D6 H/L Data Input/Output 19 D7 H/L Data Input/Output (MSB) 20 NC - No Connection

EL Back Light Terminal for DMF 5001N, 5002N, 5005N Series

Pin No. Symbol Level Function 21 EL - EL Power Supply 22 EL - EL Power Supply

CCT Back Light Terminal for DMF 5003N Series

Pin No. Symbol Level Function 1 GND - Ground for CCT Power Supply 2 NC - No Connection 3 NC - No Connection 4 HOT - CCT Power Supply

CCT Back Light Terminal for DMF 5010N Series

Pin No. Symbol Level Function 1 HOT - CCT Power Supply 2 NC - No Connection 3 NC - No Connection 4 GND - Ground for CCT Power Supply

Pin No. Layout

DMF5001N, 5002N Series DMF 5003N Series

1 2 CCT 1

Top View Top View 4

20 19 JST VHR-4N

19 20 21 22 EL

B4P-VH or B4PS-VH

DMF 5005N Series DMF 5010N Series

2 1 CCT

Top View Top View

JST 20 19 VHR-4N 20 1

BP4-VH

or BP4S-VH

22

21

EL

3.2 Block Diagram

D0 COM. DRV. LCDP

T6961B

D

___

WR CONTROL

__

RD LSI

__

CE T6963C SEG.DRV.

_

C/D T7778A

_____

*1 HALT

______

RESET

NOTE

*2 FS *1: For DMF5001N, 5002N, 5003N series only. *2: For DMF5005N, 5010N series only. 8K BYTE *3: DMF5003N, 5010N S.RAM are already included. *4: Available for DMF5001N, 5002N, 5005N

Vcc To LSI Vss BIAS

Vadj CIRCUIT

Vee

HOT EL

GND EL

CCT

BACKLIGHT

UNIT

EL

BACKLIGHT

FOIL

3.3 Signal Timings

Item Symbol Min. Max. Unit C/D Set Up Time tCDS 100 - ns C/D Hold Time tCDH 10 - ns CE, RD,. WR Pulse Width

tCP, tRP, tWP 80 - ns

Data Set Up Time tDS 80 - ns Data Hold Time tDH 40 - ns Access Time tACC - 150 ns Output Hold Time tOH 10 50 ns

Conditions: VCC = 5 ± 0.25V, GND = 0V, Ta = 25°C

Bus Timing

_ C/D

tCDS tCDH


CE

tCP, tRP, tWP


RD , WR

tDS

D 0 to D 7 (WRITE)

tDH

D 0 to D 7 (READ) tACC tOH

Graphic Display (Ex. 240 x 64 DOT)

TA = 28H, GA = 28H TH & GH = Within 0000H - 1FFFH

GH GH + 27H

GH + GA GH + GA + 27H

GH + 63GA GH + 63GA + 27H

Note: In case of graphic display, 8 bit data is as follows:

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D

 64 Dot     

1444444444444444442444444444444444443 40 x 6 = 240 Dot

← Graphic Data

Valid Data

Invalid Data

[8 x 8 Font]

The relationship between display memory address and display position on the LCD module is defined in section 3.4.2. (note: this is for 8x8 character font)

Graphics home address GH, number of graphic area GA, text home address TH, and number of text area TA are defined by “Control Word Set” command. The position of GH, TH is described in 3.4.3 RAM map.

3.4.2 Memory Address and Display Position

Text Display (Ex. 240 x 64 DOT)

TA = 1EH, GA = 1EH TH & GH = Within 0000H ∼ FFFH

TH TH + 1DH

TH + TA TH + TA + 1DH

TH + 7TA TH + 7TA + 1DH

 8 line     

1444444444444444442444444444444444443 30 Character