ECE 4100 Laboratory Assignment 1
Due Date: June 12
Using version 3.0 of the SimpleScalar simulator running the SPEC95 tomcatv.ss floating
point benchmark search the design space and design a processor using the sim-outorder
tool. Start off with the simplest possible machine, 1 issue, 1 functional unit of each type,
and assume branch taken. Using the standard command line options, add any hardware
needed to speedup the simulation clock cycles by 1% or more. By this, I mean if you
change that option to the less complex one or 1 less hardware unit of that type it slows
down by at least 1%. Just leave all cache settings at the default (don’t change them) and
you can’t have the perfect branch prediction. Keep in mind that many of the settings will
interact and you might not get the best design by changing things one at a time. Turn in a
hardcopy of the standard sim-outorder output for your optimal design. Compare the
speedup on your best design to the sim-safe simulator.
SimpleScalar is installed on the Unix machines in CoC 309. See the CoC lab TA to
activate your account, if you have not done so already. The simulator is in
/tools/solsoft/simplesim-3.0.
The SPEC 95 benchmarks are in /tools/solsoft/simpsclar/benchmarks/spec95-big. A *.ss
file is a compiled binary file for the Simplescalar simulation tools.