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The instructions and problems for exam two in computer engineering (ece 2030c) during the fall 2010 semester. The exam consists of four problems covering topics such as transparent latches, number representations, arithmetic, and building blocks. Students are required to work on paper without calculators or notes, and the exam is closed-book. The problems include designing circuits, converting notations, and performing arithmetic operations.
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4 problems, 6 pages Exam Two 27 October 2010 Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate the pages of the exam. For maximum credit, show your work. Good Luck! Your Name ( please print ) ________________________________________________ 1 2 3 4 total 21 40 15 24 100
4 problems, 6 pages Exam Two 27 October 2010 Problem 1 (3 parts, 21 points) State Part A (8 points) Implement a transparent latch using only inverters and pass gates. Label the inputs In and En , and output Out. Part B (7 points) Consider a register with a selectable write enable (WE) and read enable (RE). It is implemented with transparent latches, a 2 to 1 mux, and a pass gate. Describe its behavior by completing the output values. Also indicate when a write and/or a read is being performed. Register IN OUT WE (^) RE φ 1 φ 2 IN WE RE CLK OUT write? read?
Part C (6 points) Assume the following signals are applied to a register with write enable Draw the output signal Out. Draw a vertical line where In is sampled. Draw crosshatch where Out is unknown.
4 problems, 6 pages Exam Two 27 October 2010 Problem 3 (2 parts, 15 points) Building Blocks Part A (7 points) Complete the following truth table for a priority encoder. Assume the priority order (from highest to lowest) is I^ 2 I^ 0 I^ 3 I^ 1 I (^3)
Part B (8 points) Implement a 2 to 1 multiplexer using only basic gates (AND, OR, NAND, NOR, NOT). Label all inputs and outputs.
4 problems, 6 pages Exam Two 27 October 2010 Problem 4 (3 parts, 24 points) Counters Part A (7 points) Implement a toggle cell using only transparent latches and basic gates (XOR, AND, OR, NAND, NOR, NOT). Use an icon for the transparent latches. Label the inputs TE , CLR , Φ 1 , Φ 2 and the output Out. Part B (8 points) Now combine these toggle cells to build a divide by 24 counter. Your counter should have an external clear, external count enable, and five count outputs O 4 , O 3 , O 2 , O 1 , O 0. Use any basic gates (AND, OR, NAND, NOR, & NOT) you require. Assume clock inputs to the toggle cells are already connected. Your design should support multi-digit systems.
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TE CLR Out TE CLR Out TE CLR Out
3 TE CLR Out
TE CLR Out
