Verification Part 2-Data Communication Network-Lecture Slides, Slides of Data Communication Systems and Computer Networks

These lecture slides are from pakistani unvieristy. These are helpful in Data Communication Network course. I hope Instructor M. Mohisn Rahmattulah wont mind me making these public. I got it from my friend. Its points are: Testbench, Reusability, Compliance, Tools, Phase, Diagnostic, Development, Strategy, Assertion, Assumption

Typology: Slides

2011/2012

Uploaded on 08/01/2012

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SS-CARE School of Engineering
Spring 2007
HDL Based Digital Design
Lecture 20
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Download Verification Part 2-Data Communication Network-Lecture Slides and more Slides Data Communication Systems and Computer Networks in PDF only on Docsity!

SS-CARE School of Engineering Spring 2007

HDL Based Digital Design

Lecture 20

HDL Based Digital Design using Verilog By M. Mohsin Rahmatullah @ SS-CARE School of Engineering

Verification Guidelines

„

Define and Review Verification PlanCompliance to requirements Plan

„ Testbench architecture with considerations to: „ Reusability / ease of use / portability / verification language „ Number of Bus Functional Models (BFMs) to emulate separate busses „ Synchronization methods between BFMs „ Transactions definition and sequencing methods „ Transactions driving methods „ Verification strategies for design and its subblocks „ Compliance Matrix „ Tools

HDL Based Digital Design using Verilog By M. Mohsin Rahmatullah @ SS-CARE School of Engineering

Types of Verification „

Compliance verification

„

Corner case verification

„

Assertion-based verification (ABV)

„

Random verification

„ Create scenarios that engineers do notanticipate „

Real code verification

„ Avoid misunderstanding the spec „

Regression verification

„ Ensure that fixing a bug will not introduceanother bugs „ Be performed on a regular basis

HDL Based Digital Design using Verilog By M. Mohsin Rahmatullah @ SS-CARE School of Engineering

Assertion „

An assertion

„ Is a statement about a design’s intended behavior „ Is also named as property; used interchangeably „ Usually does not map to the real HW (notsynthesizable) „

An assertion is used

„ To ensure consistency between the designer’sintention and what he created „ To guard the design assumptions/properties