Homework Assignment 4 - Digital Design - Fall 2008 | ECE 3550, Assignments of Digital Systems Design

Material Type: Assignment; Professor: Grantner; Class: Digital Design; Subject: Electrical & Computer Engineer; University: Western Michigan University; Term: Fall 2008;

Typology: Assignments

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ECE 3550 DIGITAL DESIGN
FALL 2008
Homework Assignment #4
Total: 70 pts.
Due 11:30am, Wednesday, October 8, 2008
A synchronous sequential circuit is given by its initial state table on Page 2.
Tasks
1. Reduce the number of states using the method you have learned in class (implication
table, equivalent states). Give the reduced state table. Make sure that your reduced state
table covers for all states of the initial state table. (20 pts.)
2. Use the method you have learned in class to make a near optimal state assignment.
Show your assigned state table. (16 pts.)
3. Give the combined circuit excitation /output table. Use JK flip-flops. (18 pts.)
4. Minimize the FF input functions and the output function, respectively, by using K-
maps. Give the logic functions in Boolean algebraic form. (16 pts.)

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ECE 3550 DIGITAL DESIGN

FALL 2008

Homework Assignment # Total: 70 pts. Due 11:30am, Wednesday, October 8, 2008

A synchronous sequential circuit is given by its initial state table on Page 2.

Tasks

1. Reduce the number of states using the method you have learned in class (implication table, equivalent states). Give the reduced state table. Make sure that your reduced state table covers for all states of the initial state table. (20 pts.) 2. Use the method you have learned in class to make a near optimal state assignment. Show your assigned state table. (16 pts.) 3. Give the combined circuit excitation /output table. Use JK flip-flops. (18 pts.) 4. Minimize the FF input functions and the output function, respectively, by using K- maps. Give the logic functions in Boolean algebraic form. (16 pts.)