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9/20/6 Lecture 3 - Instruction Set - Al 1

Instruction Set

9/20/6 Lecture 3 - Instruction Set - Al 2

Lecture Overview

 The 68000 Instruction Set  The understand and effectively use an architecture must understand the register set and the instruction set.

9/20/6 Lecture 3 - Instruction Set - Al 4

Condition Code Register

 Execution of the various instructions will set different bits in the condition code register  A table is provided to show which instructions affect which status bits  For the 68000, Table 2.2 of the text gives this information (pages 47-49) – Legend is at the end of the table.

9/20/6 Lecture 3 - Instruction Set - Al 5

Data Movement

 General form: MOVE source,destination  MOVE MOVE #$00123456, D  Source operand – any addressing mode – Data in register, or memory location  Destination – use any addressing mode except immediate addressing, program counter relative  V & C bits of CCR are cleared, N & Z updated  MOVEA – Move address  Destination must be an address register (does not affect CCR)

9/20/6 Lecture 3 - Instruction Set - Al 7

MOVE to SR

 MOVE to or from SR  TO the status register is a privledged instruction – only when in supervisor mode.  FROM can be done in either mode on the 68000 but only supervisor mode on the 68010, 68020, or

 Form  MOVE ,SR  MOVE SR,

9/20/6 Lecture 3 - Instruction Set - Al 8

MOVE USP

 There are actually two A7 registers, one for the user and one that is used in supervisor mode (USP and SSP)  MOVE.L USP,An or MOVE.L An,USP copy USP value to/from address register An  Register other than the USP must be another address register.  User cannot see system stack pointer, SSP

9/20/6 Lecture 3 - Instruction Set - Al 10

MOVEQ

 Move quick  Load a value in the range -128 to +127 into a data register  Loaded as a 32 bit value  The value is sign extended to a 32-bit value  MOVEQ #-3, D  Loads $FFFF FFFD into D

9/20/6 Lecture 3 - Instruction Set - Al 11

MOVEP

 Move peripheral instruction  Copies words or longwords to an 8 bit peripheral  Byte orientated peripheral interfaced such that they map to odd or even byte addresses.  MOVEP.L D2,0(A0)  Copies contents of D2 to [A0+0], [A0+2], [A0+4], [A0+6]

9/20/6 Lecture 3 - Instruction Set - Al 13

Position independent destinations

 PC relative only allowed for source operands  Consider  LEA TABLE(PC),A  MOVE.B D0,(A0)  Loads the position independent address of TABLE into address register A  Then the least significant byte of D0 is stored at the address indicated by A

9/20/6 Lecture 3 - Instruction Set - Al 14

PEA

 Push effective address  Calculates the effective address and pushes it to the stack  Useful to put calling routines address on stack so subroutine can access actual data.

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EXG & SWAP

 EXG

 Exchange the contents of two registers  Exchanges the entire 32-bit contents  SWAP  Exchange the high and low order words of a data register.

9/20/6 Lecture 3 - Instruction Set - Al 17

Integer Arithmetic Operations

 Conventional set of integer arithmetic ops  Act on 8, 16, or 32 bit operands

 ADD - add source and destination and place result in destination  Both can be data registers OR  At least one must be a data register

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Arithmetic

 ADDI - Add immediate – adds a literal value of a byte, word, or longword to the contents of a destination operand and then stores the result in the destination.  ADDI.W #1234,(A0)  Cannot be done using ADD as one operand must be a data register. Here can do without a data register.  ADDX – Add extended  Add source and destination plus contents of the X bit of the condition code register  Both source and destination must be data registers  Carry out of msb is stored in X from operations so this allows mutiprecision data.

9/20/6 Lecture 3 - Instruction Set - Al 20

ARITHMETIC

 CLR – Loads the target with 0

 DIVS, DIVU – Integer division, signed or unsigned  DIVU ,Dn -32-bit longword in Dn is divided by the low order 16 bits at . Quotient is 16-bits and depostied in low-order word of destination