Lecture 3: Instruction Set - Interfacing Devices: Cycle Timing and Memory Parameters, Slides of Microcomputers

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Interfacing Devices

9/20/6 Lecture 3 - Instruction Set - Al 1

Interfacing devices

• Read cycle timing parameters.

• Write cycle timing parameters

• Memory Device parameters

• Other device issues

9/20/6 Lecture 3 - Instruction Set - Al 2

Timing continued

• For a slower device

• How fast/slow a

device can be

interfaced?

• t

DALDI

is 0 to 90ns

• But this is FROM

memory

9/20/6 Lecture 3 - Instruction Set - Al 4

Parameters

• Read cycle parameters

9/20/6 Lecture 3 - Instruction Set - Al 5

Memory Pinout of the 6116 static RAM 9/20/6 Lecture 3 - Instruction Set - Al 7

Items of note

• Chip is 2K x 8-bit

• Data word is a byte

• Must use LDS* and UDS* when configuring

memory with the device

• In general memory chips are 1-bit, 1-byte, or

1-word in width of the data interface.

9/20/6 Lecture 3 - Instruction Set - Al 8

Combined 68000, 6116 timing

9/20/6 Lecture 3 - Instruction Set - Al 10

• Stop here on Mon 9/20/6 Lecture 3 - Instruction Set - Al 11

Write cycle timing

9/20/6 Lecture 3 - Instruction Set - Al 13

Write cycle parameters

9/20/6 Lecture 3 - Instruction Set - Al 14

68000-6116 combination for write

9/20/6 Lecture 3 - Instruction Set - Al 16

General notes

• Can use memory or I/O devices that are

designed for the processor family

– Easy generation and use of interface pins such as

CS, AS, DTACK*, etc.

– Little glue logic (sometimes almost none)

• Use of generic memory and I/O devices

– May need a fair amount of glue logic and have to

generate some signals

– May be slower than family devices

9/20/6 Lecture 3 - Instruction Set - Al 17