PIC Architecture: Understanding Programmer's Model, Instruction Set, and Addressing Modes, Slides of Microcomputers

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PIC Architecture

Programmers Model and

Instruction Set

PICs-Programmer’s Model & Instruction

Set

• Programmer’s Model
• Instruction Set Basics
  • Accumulator Architecture
  • Direct addressing
  • Indirect addressing
• Interrupt
• F/W ???

Accumulator Architecture

• In the CPU have an accumulator
• Onboard RAM is “banked”
• ACCESS RAM can be viewed as a set of 7f

registers

• 7f = 128 8-bit registers
• The Access Bank is Bank 0
• Outside addresses 0000 to 007f access to RAM are considered Banked direct addressing and use the BSR register

Banked Addressing –

Direct Addressing Mode

• Each bank has ff bytes of 8-bit data
• User defines how larger data is stored - Big Endian - Little Endian - Multiple byte operations are supported through carry bit

9/20/6 Lecture 21 -PIC Architecture 5 Docsity.com

Indirect Addressing

• Uses a pointer to access the data
• Uses the FSRx registers
• Consider the example to add two 3-bit

numbers

Adding two 3-bit numbers

9/20/6 Lecture 21 -PIC Architecture 8 Docsity.com

Operand names of indirect registers

9/20/6 Lecture 21 -PIC Architecture 10 Docsity.com

Special Program addresses

• Address 0x
  • The reset vector
• Address 0x
  • High-priority interrupt vector
• Address 0x
  • Low-priority interrupt vector

Special Function Registers

• Located at addresses

0xf80 to 0xfff

• 2 byte registers are LSB

then MSB

9/20/6 Lecture 21 -PIC Architecture 13 Docsity.com

Concept of instructions

• A Harvard accumulator architecture
  • A lot of time moving data for operation
  • To add two variables
    • Load Variable A into accumulator
    • Add Variable B
    • Store result

The Banked Option

• Have seen that data memory is banked.
• Bank 0 – called the “Access Bank”
• When assembler is accessing a variable not in

the access bank, the BSR register must first be

loaded, and then the instruction executed.