Data Paths - HDL Design - Lecture Slides, Slides of Verilog and VHDL

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ALUs and Data Paths

Subtitle: How to design the data

path of a processor.

Lecture overview

• General Data Path Design

• Design of a multifunction ALU

ALU Operations (integer ALU)

• Add (A+B)

• Add with Carry (A+B+Cin)

• Subtract (A-B)

• Subtract with Borrow (A-B-Cin)

• [Subract reverse (B-A)]

• [Subract reverse with Borrow (B-A-Cin)]

• Negative A (-A)

• Negative B (-B)

• Increment A (A+1)

• Increment B (B+1)

• Decrement A (A-1)

• Decrement B (B-1)

• Logical AND

• Logical OR

• Logical XOR

 Not A

 Not B

 A

 B

 Multiply Step or Multiply

 Divide Step or Divide

 Mask

 Conditional AND/OR (uses

Mask)

 Shift

 Zero

A High Level Design

From Hayes textbook on architecture.

The Architecture

Arithmetic Logic Circuits

• The Brute Force Approach

• A more modern approach

Arithmetic Logic Circuits

• The Brute Force

Approach

• A more modern

approach

– Where the logic unit and

the adder unit are

optimized

N to 1 Mux

FA

Function

Cout

Cin

A B

A A

A

A B

B B

Logic

Unit

Arithmetic

Unit

2 to 1 Mux

A B A B

S

A Generic Function Unit

• To Design – a multifunction unit

• Desire a generic functional unit that can perform many functions

G (A,B)

A B

4-to-

Mux

G

G

G

G

 A 4-to-1 mux will perform all basic logic

functions of 2 inputs – known fact

Low level implementation

• An implementation in

pass gates (CMOS)

• When the control signal

is a ‘1’ the value will be

transmitted across the T

gate

• Otherwise it is an open

switch – i.e. high z

G

G

G

G

A A’ B B’

G(A,B

A B A’ B’ G(A,B) AB A+B AxorB

0 0 1 1 G0 0 0 0

0 1 1 0 G1 0 1 1

1 0 0 1 G2 0 1 1

1 1 0 0 G3 1 1 0

Lets look at Binary Addition

• We can use this generic function

unit construct a generic ALU.

• For Binary Addition consider the

following:

– SUM

i

= A

i

xor B

i

xor C

i

– C

i+

= A

i

B

i

+ A

i

C

i

+ B

i

C

i

A B Cin Sum Cout

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

New functions

• Using these definitions of P and K

• SUM

i

= P

i

xor C

i

• C

i+

= P

i

C

i

+ P

i

’ K

i

• = P

i

C

i

+ A

i

B

i

• You can use the generic functional blocks to

generate P and K and then select the correct

function for final output

A bit slice of the ALU

• Slice starts out with a generic unit

which can produce any function of

inputs A

i

and B

i

to produce P

i

• Need another to produce K

i

(kill

block)

• And a 3

rd

to generate the result

(results generator block)

• And also need a dedicated unit to

compute the carry out, the C

i+

term

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate

Block

Kill

Block

Carry

Chain

Results

Generator

Ai Bi

Ai Bi

Pi Ci

Carry chain implementation

• CMOS – Manchester carry chain using

precharge pulldown logic works well.

• ECL – Carry look-ahead circuitry works well as

ECL allows for large fan-in wired OR gates.

Multibit implementation

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci

P

P

P

P

Pi

K

K

K

K

Ki

R

R

R

R

Ri

Ci+1^ Ci

Propagate Block

Kill Block

Carry Chain

Results Generator

Ai Bi

Ai Bi

Pi Ci